Datasheet NC7SV74 (ON Semiconductor) - 3

Logic Symbol/s
IEEE/IEC Pin Names Description D Data Input CK Clock Pulse Input CLR Direct Clear Input Q, Q Flip-Flop Output PR Direct Preset Input Connection Diagram/s Truth Table/s Pin Assignments for US8
Inputs Outputs CLR PR D CK L H X H L X Function Q Q X L H Clear X H L Preset L L X X H H — H H L -L H — H H H -H L — H H X ¯ Qn Qn No Change H = HIGH Logic Level
L = LOW Logic Level
Qn = No change in data
X = Immaterial
Z = High Impedance
-= Rising Edge
¯ = Falling edge (Top View)
Pin One Orientation Diagram AAA represents Product Code Top Mark -see ordering info
Note: Orientation of Top Mark determines Pin One location. Read the top product code mark left to right, Pin One
is the lower left pin (see diagram).
Pad Assignments for MicroPak (Top Through View) © 2003 Fairchild Semiconductor Corporation
NC7SV74 • Rev. 3.0.0 www.fairchildsemi.com
2 NC7SV74 — TinyLogic® ULP-A D Type Flip-Flop with Preset and Clear Pin Descriptions