Datasheet MAX7409, MAX7410, MAX7413, MAX7414 (Maxim) - 9

5th-Order, Lowpass, Switched-Capacitor Filters MAX7409/MAX7410/MAX7413/MAX7414 Low-Power Shutdown Mode
VSUPPLY These devices feature a shutdown mode that is activat- ed by driving SHDN low. In shutdown mode, the filter’s supply current reduces to 0.2µA and its output becomes 0.1µF high impedance. For normal operation, drive SHDN VDD SHDN high or connect it to VDD. OUT OUTPUT
__________Applications Information
INPUT IN COM 0.1µF 50k
Offset and Common-Mode
MAX7409
Input Adjustment
MAX7410 MAX7413 The COM pin sets the common-mode input voltage and CLOCK CLK OS 50k MAX7414 0.1µF is biased at mid-supply with an internal resistor-divider. If the application does not require offset adjustment, 50k GND connect OS to COM. For applications requiring offset adjustment, apply an external bias voltage through a resistor-divider network to OS such as shown in Fig- ure 3. For applications that require DC level shifting, Figure 3. Offset Adjustment Circuit adjust OS with respect to COM. (Note: OS should not be left unconnected.) The output voltage is represent- ed by this equation: V+ VOUT = (VIN - VCOM) + VOS VDD * with V SHDN COM = VDD / 2 (typical), and where (VIN - VCOM) is lowpass filtered by the SCF, and OS is added at the OUT OUTPUT INPUT IN output stage. See the Electrical Characteristics for the COM voltage range of COM and OS. Changing the voltage on COM or OS significantly from midsupply reduces MAX7409 the filter’s dynamic range. V+ MAX7410 CLOCK CLK OS V- MAX7413 MAX7414 0.1µF 0.1µF
Power Supplies
The MAX7409/MAX7410 operate from a single +5V GND supply and the MAX7413/MAX7414 operate from a sin- gle +3V supply. Bypass VDD to GND with a 0.1µF capacitor. If dual supplies are required (±2.5V for V- MAX7409/MAX7410, ±1.5V for MAX7413/MAX7414), *DRIVE SHDN TO V- FOR LOW-POWER SHUTDOWN MODE. connect COM to system ground and connect GND to the negative supply. Figure 4 shows an example of Figure 4. Dual-Supply Operation dual-supply operation. Single- and dual-supply perfor- mance are equivalent. For either single- or dual-supply
Anti-Aliasing and DAC Postfiltering
operation, drive CLK and SHDN from GND (V- in dual- When using these devices for anti-aliasing or DAC supply operation) to VDD. For ±5V dual-supply applica- postfiltering, synchronize the DAC (or ADC) and the fil- tions, use the MAX291–MAX297. ter clocks. If the clocks are not synchronized, beat fre- quencies will alias into the desired passband.
Input Signal Amplitude Range
The optimal input signal range is determined by
Harmonic Distortion
observing the voltage level at which the Total Harmonic Harmonic distortion arises from nonlinearities within the Distortion + Noise is minimized for a given corner fre- filter. These nonlinearities generate harmonics when a quency. The Typical Operating Characteristics show pure sine wave is applied to the filter input. Table 1 lists graphs of the devices’ Total Harmonic Distortion plus typical harmonic-distortion values for the MAX7410/ Noise Response as the input signal’s peak-to-peak MAX7414 with a 10kΩ load at TA = +25°C. Table 2 lists amplitude is varied. typical harmonic-distortion values for the MAX7409/ MAX7413 with a 10kΩ load at TA = +25°C.
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