Datasheet TLP5212 (Toshiba) - 7

TLP5212
11. Switching Characteristics (Note) (Unless otherwise specified, Ta = - 40 to 110 °C, VCC2 - VEE = 15 to 30 V, VE - VEE = 0 V)
Characteristics Symbol Note Test Circuit Condition Min Typ. Max Unit Propagation L→H tpLH IF = 0 → 10 mA 100 167 250 delay time H→L tpHL Note 1 IF = 10 → 0 mA 100 170 250 Rg = 10 Ω, Pulse width distortion | tpHL-tpLH | － 3 50 C 13.1. g = 10 nF, Note 1 I Propagation delay skew V F = 10 ↔ 0 mA ns (device to device) tpsk 11 CC2 = 30 V Note 2 -150 － 150 f = 10 kHz, Output rise time duty = 50 % (10−90 %) tr IF = 0 → 10 mA － 57 － Note 1 Output fal time (90−10 %) tf IF = 10 → 0 mA － 56 － DESAT Sense to 90% V － 147 500 ns OUT Delay tDESAT(90%) DESAT Sense to 10% C V DESAT = 100 pF OUT Delay tDESAT(10%) － 2 3 Rg = 10 Ω, μs DESAT leading edge Cg = 10 nF, blanking time tDESAT(LEB) － 1.27 － VCC2 = 30 V DESAT filter time tDESAT(FILTER) － 95 － ns DESAT Sense to DESAT Low Propagation Delay tDESAT(LOW) － 172 － 13.1. CDESAT = 100 pF, CF = Open, DESAT Sense to Low 12 Rg = 10 Ω, RF = 2.1 kΩ － 343 500 Level FAULT Signal tDESAT(FAULT) Cg = 10 nF, ns Delay V C CC2 = 30 V, F = 1 nF, V R CC1 = 5 V F = 2.1 kΩ － 644 － DESAT Input Mute tDESAT(MUTE) 5 - － C VCC1 = 5.5 V, DESAT = 100 pF, R RF = 2.1 kΩ 0.1 0.63 2.5 μs RESET to High Level g = 10 Ω, FAULT Signal Delay tRESET(FAULT) Cg = 10 nF, V V CC1 = 3.3 V, CC2 = 30 V RF = 2.1 kΩ 0.1 0.65 2.5 IF = 10 mA, Output High Level 13.1. Ta = 25 ℃ , C Common Mode CM F = 15 pF ±25 ±40 － H Note 3 13, Transient Immunity 13.1. VCM = 1500 VP-P, IF = 10 mA, 14, VCC2 = 30 V, CF = 1 nF ±50 ±100 － 13.1. R kV/μs F = 2.1 kΩ, VF = 0 V, Output Low Level 15, Rg = 10 Ω, C Common Mode CM 13.1. F = 15 pF ±25 ±40 － L Note 4 C Transient Immunity 16 g = 10 nF VF = 0 V, CF = 1 nF ±50 ±100 － Note : All typical values are at Ta = 25 ℃. CF is approximately 15 pF which includes probe and stray wiring capacitance. Note 1: Input signal: f = 10 kHz, duty = 50 %, tr = tf = 5 ns or less Note 2: The propagation delay skew, tpsk, is equal to the magnitude of the worst-case difference in tpHL and/or tpLH that wil be seen between units at the same given conditions (supply voltage, input current, temperature, etc). Note 3: Common mode transient immunity in the high state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output wil remain in the high state (VOUT > 23 V, VFAULT > 3 V). Note 4: Common mode transient immunity in the low state is the maximum tolerable dVCM/dt of the common mode pulse, VCM, to assure that the output wil remain in a low state (VOUT < 1 V, VFAULT < 2 V). ©2022 7 2022-03-02 Toshiba Electronic Devices & Storage Corporation. Rev.1.0