Datasheet VNF1048F (STMicroelectronics) - 4

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VNF1048F Electrical specification 2 Electrical specification 2.1 Absolute maximum ratings
Stressing the device above the rating listed in Table 2 may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to the conditions in the table below for extended periods may affect device reliability.
Table 2. Absolute maximum rating Symbol Parameter Value Unit
VS DC supply voltage -0.3 to 70 V -IGND DC reverse ground pin current 200 mA VSPI DC input voltage -0.3 to 5.5 V V3V3 DC Output voltage -0.3 to 4.6 V VCSN, VSDI, VSCK SPI pins DC input voltage -0.3 to 5.5 V VSDO SPI pins DC output voltage -0.3 to VSPI +0.3 V VHWLO DC input voltage -0.3 to 5.5 V VDIAG DC Output voltage -0.3 to V_SPI + 0.3 V IDIAG DC Input current Internally limited if VS< 3.3 V mA VISNS_P -0.3 to VS +0.3 if VS< 3.3 V V DC input voltage VISNS_N VS-3.3 to VS +0.3 if VOUT<VCP-20 V V Vout-0.3 V to Vout + 20 V if Vout < VCP-20 V VHS_GATE DC Output voltage V Vout-0.3 V to VCP + 0.3 V VOUT DC Output voltage -2 to VS +3 V -10 to VS +3 VOUT transient Transient Output voltage V For 10 µs max -0.3 to VS +0.3 if VS<3.3 V V VNTC DC input voltage VS -3.3 to VS +0.3 V -0.3 to VS +0.3 if VS<3.3 V V VNTC_M DC input voltage VS -3.3 to VS +0.3 V VCP DC input voltage VS -0.3 to VS+20 V VCP1P DC input voltage VS -0.3 to VS+20 V VCP2P DC input voltage VS -0.6 to VS+20 V VCP1M, VCP2M DC input voltage -0.3 to VS +0.3 V VESD Electrostatic discharge (JEDEC 22A-114F) 2000 V ±500(1) VESD Charge device model (CDM-AEC-Q100-011) V ±750(2) Tj Junction operating temperature -40 to 150 °C
DS13084
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Rev 6 page 4/52
Document Outline 1 Block diagram and pin description 2 Electrical specification 2.1 Absolute maximum ratings 2.2 Thermal data 2.3 Main electrical characteristics 3 eFuse function 4 Self Test 4.1 Current Sense Self Test 4.2 External FET VDS Detection Self Test 4.3 External FET Stuck-on Self Test 5 Protections 5.1 Battery undervoltage shutdown 5.2 Device overtemperature shutdown 5.3 External MOSFET overtemperature shutdown 5.4 External MOSFET desaturation shut-down 5.5 Hard short circuit latch-off 5.6 Current vs time latch-off 5.7 Low Current Bypass desaturation shut-down 6 SPI functional description 6.1 SPI Communication 6.2 Signal description 6.3 SPI protocol 6.4 Operating code definition 6.5 Write mode 6.6 Read mode 6.7 Read and clear status command 6.8 SPI device information 6.9 Special commands 6.10 Global status byte 6.11 Address map 6.12 ROM memory map 6.13 Control registers 6.14 Status registers 6.15 Timeout watchdog 7 Operating modes 7.1 State Diagram 7.2 PowerON mode 7.3 Stand-by mode 7.4 WakeUp mode 7.5 Unlocked mode 7.6 Locked mode 7.7 Self-test mode 8 Application information 9 Package information 9.1 QFN32L 5x5 package information Revision history