Datasheet ADG1221, ADG1222, ADG1223 (Analog Devices) - 3

FabricanteAnalog Devices
DescripciónLow Capacitance, Low Charge Injection, ±15 V/+12 V iCMOS Dual SPST Switches
Páginas / Página16 / 3 — Data Sheet. ADG1221/ADG1222/ADG1223. SPECIFICATIONS DUAL SUPPLY. Table 1. …
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Data Sheet. ADG1221/ADG1222/ADG1223. SPECIFICATIONS DUAL SUPPLY. Table 1. Temperature. Parameter. 25°C. –40°C to +85°C

Data Sheet ADG1221/ADG1222/ADG1223 SPECIFICATIONS DUAL SUPPLY Table 1 Temperature Parameter 25°C –40°C to +85°C

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Data Sheet ADG1221/ADG1222/ADG1223 SPECIFICATIONS DUAL SUPPLY
VDD = 15 V ± 10%, VSS = –15 V ± 10%, GND = 0 V, unless otherwise noted.
Table 1. Temperature Parameter 25°C –40°C to +85°C –40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range VDD to VSS V On Resistance, RON VDD = +13.5 V, VSS = –13.5 V, VS = ±10 V, IS = –1 mA (see Figure 23) 120 Ω typ 200 240 270 Ω max On Resistance Match VS = ±10 V, IS = –1 mA Between Channels, ∆RON 2.5 Ω typ 6 10 12 Ω max On Resistance Flatness, RFLAT(ON) VS = –5 V/0 V/+5 V; IS = –1 mA 20 Ω typ 64 76 83 Ω max LEAKAGE CURRENTS VDD = +16.5 V, VSS = –16.5 V Source Off Leakage, IS (Off ) VS = ±10 V, VD = ±10 V (see Figure 24) ±0.002 nA typ ±0.1 ±0.6 ±1 nA max Drain Off Leakage, ID (Off ) VS = ±10 V, VD = ±10 V (see Figure 24) ±0.002 nA typ ±0.1 ±0.6 ±1 nA max Channel On Leakage, ID, IS (On) VS = VD = ±10 V (see Figure 25) ±0.01 nA typ ±0.2 ±0.6 ±1 nA max DIGITAL INPUTS Input High Voltage, VINH 2.0 V min Input Low Voltage, VINL 0.8 V max Input Current, IINL or IINH VIN = VINL or VINH 0.005 μA typ ±0.1 μA max Digital Input Capacitance, CIN 2.5 pF typ DYNAMIC CHARACTERISTICS1 tON RL = 300 Ω, CL = 35 pF, VS = 10 V (see Figure 26) 130 ns typ 170 210 240 ns max tOFF RL = 300 Ω, CL = 35 pF, VS = 10 V (see Figure 26) 85 ns typ 105 130 140 ns max Break-Before-Make Time Delay RL = 300 Ω, CL = 35 pF, VS1 = VS2 = 10 V (ADG1223 Only), tBBM (see Figure 27) 40 ns typ 10 ns min Charge Injection, QINJ 0.1 pC typ VS = 0 V, RS = 0 Ω, CL = 1 nF (see Figure 28) Off Isolation 75 dB typ RL = 50 Ω, CL = 1 pF, f = 1 MHz (see Figure 29) Rev. B | Page 3 of 16 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION REVISION HISTORY SPECIFICATIONS DUAL SUPPLY SINGLE SUPPLY ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TERMINOLOGY TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS OUTLINE DIMENSIONS ORDERING GUIDE