ADG1404Data SheetPIN CONFIGURATIONS AND FUNCTION DESCRIPTIONSENA0A1NC65431111A0 114 A1V112SSGNDEN213 GNDNC211 VDDADG1404TOP VIEWV3S1 310 S3SSADG1404 12 VDD(Not to Scale)S2 49S4S1 4TOP VIEW11 S3(Not to Scale)S2 510 S45678D 69NCDNCNCNCNC78NC 2 NOTES -00 1. EXPOSED PAD TIED TO SUBSTRATE, V -003 SS.NC = NO CONNECT 816 2. NC = NO CONNECT. 816 6 06 0 Figure 2. TSSOP Pin Configuration Figure 3. LFCSP Pin Configuration Table 6. Pin Function DescriptionsPin No.TSSOP LFCSP MnemonicDescription 1 15 A0 Logic Control Input. 2 16 EN Active High Digital Input. When this pin is low, the device is disabled and all switches are off. When this pin is high, the Ax logic inputs determine the on switches. 3 1 VSS Most Negative Power Supply Potential. 4 3 S1 Source Terminal. Can be an input or an output. 5 4 S2 Source Terminal. Can be an input or an output. 6 6 D Drain Terminal. Can be an input or an output. 7 to 9 2, 5, 7, 8, 13 NC No Connection. 10 9 S4 Source Terminal. Can be an input or an output. 11 10 S3 Source Terminal. Can be an input or an output. 12 11 VDD Most Positive Power Supply Potential. 13 12 GND Ground (0 V) Reference. 14 14 A1 Logic Control Input. TRUTH TABLETable 7. EN A1 A0 S1 S2 S3 S4 0 X X Off Off Off Off 1 0 0 On Off Off Off 1 0 1 Off On Off Off 1 1 0 Off Off On Off 1 1 1 Off Off Off On Rev. B | Page 8 of 16 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications 15 V Dual Supply 12 V Single Supply 5 V Dual Supply Continuous Current, S or D Absolute Maximum Ratings ESD Caution Pin Configurations and Function Descriptions Truth Table Typical Performance Characteristics Terminology Test Circuits Outline Dimensions Ordering Guide