Datasheet ADG798-KGD (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | High Temperature, Low Voltage, 8-Channel Multiplexer |
| Páginas / Página | 13 / 5 — Known Good Die. ADG798-KGD. DUAL SUPPLY. Table 3. −55°C. TA ≤ +175°C. … |
| Formato / tamaño de archivo | PDF / 822 Kb |
| Idioma del documento | Inglés |
Known Good Die. ADG798-KGD. DUAL SUPPLY. Table 3. −55°C. TA ≤ +175°C. −55°C ≤ TA ≤ +210°C. Parameter. Symbol. Test Conditions/Comments. Min
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Known Good Die ADG798-KGD DUAL SUPPLY
VDD = 2.5 V ± 10%, VSS = −2.5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3. −55°C ≤ TA ≤ +175°C −55°C ≤ TA ≤ +210°C Parameter Symbol Test Conditions/Comments Min Typ1 Max Min Typ1 Max Unit
ANALOG SWITCH Analog Signal Range VSS VDD VSS VDD V On Resistance RON VS = VSS to VDD, IDS = 10 mA, 4.5 9 5 10 Ω see Figure 3 Matching Between Channels ΔRON VS = VSS to VDD, IDS = 10 mA 0.6 1.2 1.25 1.5 Ω Flatness RFLAT (ON) VS = VSS to VDD, IDS = 10 mA 0.5 1.5 0.6 2 Ω LEAKAGE CURRENTS VDD = +2.75 V, VS = −2.75 V Source Off Leakage IS (Off) VS = +2.25 V/−1.25 V, −50 ±0.01 +50 −180 ±0.01 +180 nA VD = −1.25 V/+2.25 V, see Figure 4 Drain Off Leakage ID (Off ) VS = +2.25 V/−1.25 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA VD = −1.25 V/+2.25 V, see Figure 5 Channel On Leakage ID, IS (On) VD = VS = −1.25 V/+2.25 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 6 DIGITAL INPUTS Input Voltage High VINH 1.7 1.7 V Low VINL 0.7 0.7 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF, 18 28 18 30 ns see Figure 7, VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V Break-Before-Make Time Delay tOPEN RL = 150 Ω, CL = 15 pF, 1 10 1 10 ns VS = 2 V, see Figure 8 TA = maximum temperature 13 13 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF, 19 28 19 30 ns VS = 2 V, see Figure 9 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF, 11.5 19 11.5 20 ns VS = 2 V, see Figure 9 Charge Injection QINJ VS = 0 V, RS = 0 Ω, CL = 1 nF, ±3 ±3 pC see Figure 10 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 11 Channel to Channel Crosstalk RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 12 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF, see Figure 13 55 55 MHz Source Capacitance, Off CS (Off ) f = 1 MHz 13 13 pF Drain Capacitance, Off CD (Off ) f = 1 MHz 85 85 pF Source/Drain Capacitance, On CD, CS (On) f = 1 MHz 96 96 pF POWER REQUIREMENTS Supply Current IDD VDD = 2.75 V, 5 35 40 70 μA digital inputs = 0 V or 2.75 V ISS VSS = −2.75 V, 5 35 40 70 μA digital inputs = 0 V or 2.75 V 1 TA = 25°C, except for the analog switch and power requirements values where TA = 175°C or 210°C. Rev. 0 | Page 5 of 13 Document Outline FEATURES APPLICATIONS METAL MASK DIE IMAGE GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D PEAK CURRENT PER CHANNEL, Sx OR D (PULSED AT 1 MS, 10% DUTY CYCLE MAXIMUM) ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TEST CIRCUITS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE
Known Good Die ADG798-KGD DUAL SUPPLY
VDD = 2.5 V ± 10%, VSS = −2.5 V ± 10%, GND = 0 V, unless otherwise noted.
Table 3. −55°C ≤ TA ≤ +175°C −55°C ≤ TA ≤ +210°C Parameter Symbol Test Conditions/Comments Min Typ1 Max Min Typ1 Max Unit
ANALOG SWITCH Analog Signal Range VSS VDD VSS VDD V On Resistance RON VS = VSS to VDD, IDS = 10 mA, 4.5 9 5 10 Ω see Figure 3 Matching Between Channels ΔRON VS = VSS to VDD, IDS = 10 mA 0.6 1.2 1.25 1.5 Ω Flatness RFLAT (ON) VS = VSS to VDD, IDS = 10 mA 0.5 1.5 0.6 2 Ω LEAKAGE CURRENTS VDD = +2.75 V, VS = −2.75 V Source Off Leakage IS (Off) VS = +2.25 V/−1.25 V, −50 ±0.01 +50 −180 ±0.01 +180 nA VD = −1.25 V/+2.25 V, see Figure 4 Drain Off Leakage ID (Off ) VS = +2.25 V/−1.25 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA VD = −1.25 V/+2.25 V, see Figure 5 Channel On Leakage ID, IS (On) VD = VS = −1.25 V/+2.25 V, −650 ±0.01 +650 −2600 ±0.01 +2600 nA see Figure 6 DIGITAL INPUTS Input Voltage High VINH 1.7 1.7 V Low VINL 0.7 0.7 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF, 18 28 18 30 ns see Figure 7, VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V Break-Before-Make Time Delay tOPEN RL = 150 Ω, CL = 15 pF, 1 10 1 10 ns VS = 2 V, see Figure 8 TA = maximum temperature 13 13 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF, 19 28 19 30 ns VS = 2 V, see Figure 9 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF, 11.5 19 11.5 20 ns VS = 2 V, see Figure 9 Charge Injection QINJ VS = 0 V, RS = 0 Ω, CL = 1 nF, ±3 ±3 pC see Figure 10 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 11 Channel to Channel Crosstalk RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, −80 −80 dB f = 1 MHz, see Figure 12 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF, see Figure 13 55 55 MHz Source Capacitance, Off CS (Off ) f = 1 MHz 13 13 pF Drain Capacitance, Off CD (Off ) f = 1 MHz 85 85 pF Source/Drain Capacitance, On CD, CS (On) f = 1 MHz 96 96 pF POWER REQUIREMENTS Supply Current IDD VDD = 2.75 V, 5 35 40 70 μA digital inputs = 0 V or 2.75 V ISS VSS = −2.75 V, 5 35 40 70 μA digital inputs = 0 V or 2.75 V 1 TA = 25°C, except for the analog switch and power requirements values where TA = 175°C or 210°C. Rev. 0 | Page 5 of 13 Document Outline FEATURES APPLICATIONS METAL MASK DIE IMAGE GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D PEAK CURRENT PER CHANNEL, Sx OR D (PULSED AT 1 MS, 10% DUTY CYCLE MAXIMUM) ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TEST CIRCUITS OUTLINE DIMENSIONS DIE SPECIFICATIONS AND ASSEMBLY RECOMMENDATIONS ORDERING GUIDE