Datasheet ADG798 (Analog Devices) - 7
| Fabricante | Analog Devices |
| Descripción | High Temperature, Low Voltage 8-Channel Multiplexer |
| Páginas / Página | 22 / 7 — Data Sheet. ADG798. DUAL SUPPLY. Table 3. TSSOP. FLATPACK. Parameter. … |
| Revisión | A |
| Formato / tamaño de archivo | PDF / 433 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADG798. DUAL SUPPLY. Table 3. TSSOP. FLATPACK. Parameter. Symbol. Test Conditions/Comments1. Min. Typ2. Max. Typ. Unit
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Data Sheet ADG798 DUAL SUPPLY
VDD = 2.5 V ± 10%, VSS = −2.5 V ± 10%, GND = 0 V, unless otherwise noted. TSSOP temperature range = −55°C ≤ TA ≤ +175°C and FLATPACK temperature range = −55°C ≤ TA ≤ +210°C, unless otherwise noted.
Table 3. TSSOP FLATPACK Parameter Symbol Test Conditions/Comments1 Min Typ2 Max Min Typ
2
Max Unit
ANALOG SWITCH Analog Signal Range 0 VDD VSS VDD V On Resistance RON VS = VSS to VDD, IDS = 10 mA; 4.5 9 5 10 Ω see Figure 24 Matching Between ΔRON VS = VSS to VDD, IDS = 10 mA 0.6 1.2 1.25 1.5 Ω Channels Flatness RFLAT (ON) VS = VSS to VDD, IDS = 10 mA 1.5 0.6 2 Ω LEAKAGE CURRENTS VDD = +2.75 V, VS = −2.75 V Source Off Leakage IS (Off) VS = +2.25 V/−1.25 V, VD = −50 ±0.01 +50 −180 ±0.01 +180 nA −1.25 V/+2.25 V; see Figure 25 Drain Off Leakage ID (Off) VS = +2.25 V/−1.25 V, VD = −650 ±0.01 +650 −2600 ±0.01 +2600 nA −1.25 V/+2.25 V; see Figure 26 Channel On Leakage ID (On), VD = VS = −1.25 V/+2.25 V; see −650 ±0.01 +650 −2600 ±0.01 +2600 nA IS (On) Figure 27 DIGITAL INPUTS Input Voltage High VINH 2.4 2.0 V Low VINL 0.8 0.8 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS3 Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF; see 18 28 14 30 ns Figure 28 VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V Break-Before-Make Time tOPEN RL = 150 Ω, CL = 15 pF, VS = 2 V; 1 10 1 10 ns Delay see Figure 29 TA = maximum temperature 13 13 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF 19 28 19 30 ns VS = 2 V; see Figure 30 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF 11.5 19 11.5 20 ns VS = 2 V; see Figure 30 Charge Injection QINJ VS = 0 V, RS = 0 Ω, CL = 1 nF; ±3 ±3 pC see Figure 31 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; −80 −80 dB see Figure 32 Channel to Channel RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB Crosstalk RL = 50 Ω, CL = 5 pF, f = 1 MHz; see −80 −80 dB Figure 33 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see 55 55 MHz Figure 34 Source Capacitance, Off CS (Off) f = 1 MHz 13 13 pF Rev. A | Page 7 of 22 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLICATIONS INFORMATION POWER SUPPLY SEQUENCING OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADG798 DUAL SUPPLY
VDD = 2.5 V ± 10%, VSS = −2.5 V ± 10%, GND = 0 V, unless otherwise noted. TSSOP temperature range = −55°C ≤ TA ≤ +175°C and FLATPACK temperature range = −55°C ≤ TA ≤ +210°C, unless otherwise noted.
Table 3. TSSOP FLATPACK Parameter Symbol Test Conditions/Comments1 Min Typ2 Max Min Typ
2
Max Unit
ANALOG SWITCH Analog Signal Range 0 VDD VSS VDD V On Resistance RON VS = VSS to VDD, IDS = 10 mA; 4.5 9 5 10 Ω see Figure 24 Matching Between ΔRON VS = VSS to VDD, IDS = 10 mA 0.6 1.2 1.25 1.5 Ω Channels Flatness RFLAT (ON) VS = VSS to VDD, IDS = 10 mA 1.5 0.6 2 Ω LEAKAGE CURRENTS VDD = +2.75 V, VS = −2.75 V Source Off Leakage IS (Off) VS = +2.25 V/−1.25 V, VD = −50 ±0.01 +50 −180 ±0.01 +180 nA −1.25 V/+2.25 V; see Figure 25 Drain Off Leakage ID (Off) VS = +2.25 V/−1.25 V, VD = −650 ±0.01 +650 −2600 ±0.01 +2600 nA −1.25 V/+2.25 V; see Figure 26 Channel On Leakage ID (On), VD = VS = −1.25 V/+2.25 V; see −650 ±0.01 +650 −2600 ±0.01 +2600 nA IS (On) Figure 27 DIGITAL INPUTS Input Voltage High VINH 2.4 2.0 V Low VINL 0.8 0.8 V Input Current IINL or IINH VIN = VINL or VINH −800 +0.005 +800 −800 +0.005 +800 nA Digital Input Capacitance CIN 2 2 pF DYNAMIC CHARACTERISTICS3 Transition Time tTRANSITION RL = 150 Ω, CL = 15 pF; see 18 28 14 30 ns Figure 28 VS1 = 1.5 V/0 V, VS8 = 0 V/1.5 V Break-Before-Make Time tOPEN RL = 150 Ω, CL = 15 pF, VS = 2 V; 1 10 1 10 ns Delay see Figure 29 TA = maximum temperature 13 13 ns On Time tON (EN) RL = 150 Ω, CL = 15 pF 19 28 19 30 ns VS = 2 V; see Figure 30 Off Time tOFF (EN) RL = 150 Ω, CL = 15 pF 11.5 19 11.5 20 ns VS = 2 V; see Figure 30 Charge Injection QINJ VS = 0 V, RS = 0 Ω, CL = 1 nF; ±3 ±3 pC see Figure 31 Off Isolation RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB RL = 50 Ω, CL = 5 pF, f = 1 MHz; −80 −80 dB see Figure 32 Channel to Channel RL = 50 Ω, CL = 5 pF, f = 10 MHz −60 −60 dB Crosstalk RL = 50 Ω, CL = 5 pF, f = 1 MHz; see −80 −80 dB Figure 33 −3 dB Bandwidth RL = 50 Ω, CL = 5 pF; see 55 55 MHz Figure 34 Source Capacitance, Off CS (Off) f = 1 MHz 13 13 pF Rev. A | Page 7 of 22 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR D ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TRUTH TABLE TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION APPLICATIONS INFORMATION POWER SUPPLY SEQUENCING OUTLINE DIMENSIONS ORDERING GUIDE