Datasheet ADGS5414 (Analog Devices) - 9

link to page 19 link to page 19 link to page 19 link to page 19 link to page 20 link to page 20 link to page 20 link to page 20 link to page 20 link to page 19 link to page 19
Data Sheet ADGS5414 36 V SINGLE SUPPLY
VDD = 36 V ± 10%, VSS = 0 V, VL = 2.7 V to 5.5 V, GND = 0 V, unless otherwise noted.
Table 4. Parameter +25°C −40°C to +85°C −40°C to +125°C Unit Test Conditions/Comments
ANALOG SWITCH Analog Signal Range 0 V to VDD V On Resistance, RON 14.5 Ω typ VS = 0 V to 30 V, IS = −10 mA; see Figure 29 16 19 23 Ω max VDD = 32.4 V, VSS = 0 V On-Resistance Match Between Channels, 0.3 Ω typ VS = 0 V to 30 V, IS = −10 mA ∆RON 0.8 1.3 1.4 Ω max On-Resistance Flatness, RFLAT(ON) 3.5 Ω typ VS = 0 V to 30 V, IS = −10 mA 4.3 5.5 6.5 Ω max LEAKAGE CURRENTS VDD = 39.6 V, VSS = 0 V Source Off Leakage, IS (Off ) ±0.1 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see Figure 32 ±0.25 ±1 ±7 nA max Drain Off Leakage, ID (Off ) ±0.1 nA typ VS = 1 V/30 V, VD = 30 V/1 V; see Figure 32 ±0.25 ±1 ±7 nA max Channel On Leakage, ID (On), IS (On) ±0.15 nA typ VS = VD = 1 V/30 V; see Figure 28 ±0.4 ±2 ±14 nA max DIGITAL OUTPUT Output Voltage Low, VOL 0.4 V max ISINK = 5 mA 0.2 V max ISINK = 1 mA Output Current, IOL or IOH 0.001 μA typ VOUT = VGND or VL ±0.1 μA max Digital Output Capacitance, COUT 4 pF typ DIGITAL INPUTS Input Voltage High, VINH 2 V min 3.3 V < VL ≤ 5.5 V 1.35 V min 2.7 V ≤ VL ≤ 3.3 V Low, VINL 0.8 V max 3.3 V < VL ≤ 5.5 V 0.8 V max 2.7 V ≤ VL ≤ 3.3 V Input Current, IINL or IINH 0.001 μA typ VIN = VGND or VL ±0.1 μA max Digital Input Capacitance, CIN 4 pF typ DYNAMIC CHARACTERISTICS tON 425 ns typ RL = 300 Ω, CL = 35 pF 435 515 515 ns max VS = 18 V; see Figure 37 tOFF 145 ns typ RL = 300 Ω, CL = 35 pF 151 195 195 ns max VS = 18 V; see Figure 37 Break-Before-Make Time Delay, tD 260 ns typ RL = 300 Ω, CL = 35 pF 245 205 ns min VS1 = VS2 = 18 V; see Figure 36 Charge Injection, QINJ 145 pC typ VS = 18 V, RS = 0 Ω, CL = 1 nF; see Figure 38 Off Isolation −60 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; see Figure 31 Channel to Channel Crosstalk −75 dB typ RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 30 Rev. 0 | Page 9 of 30 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, Sx OR Dx Pins TIMING SPECIFICATIONS Timing Diagrams ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION ADDRESS MODE ERROR DETECTION FEATURES CRC Error Detection SCLK Count Error Detection Invalid Read/Write Address Error CLEARING THE ERROR FLAGS REGISTER BURST MODE SOFTWARE RESET DAISY-CHAIN MODE POWER-ON RESET BREAK-BEFORE-MAKE SWITCHING TRENCH ISOLATION APPLICATIONS INFORMATION POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS REGISTER SUMMARY REGISTER DETAILS SWITCH DATA REGISTER ERROR CONFIGURATION REGISTER ERROR FLAGS REGISTER BURST ENABLE REGISTER SOFTWARE RESET REGISTER OUTLINE DIMENSIONS ORDERING GUIDE