Datasheet ADG5421F (Analog Devices)

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±60 V Fault Protection and Detection, 11 Ω RON, Dual SPST Switch Data Sheet ADG5421F FEATURES FUNCTIONAL BLOCK DIAGRAM Overvoltage fault protection up to ±60 V on S1 and S2 pins ADG5421F Power-off protection up to ±60 V on S1 and S2 pins S1 D1 Known state without digital inputs present S2 D2 Low on resistance of 11 Ω typical Ultraflat, on resistance FAULT Latch-up immune under any circumstance DETECTION FF AND SWITCH 3.5 kV human body model (HBM) ESD rating
001
DRIVER V
25051-
SS to VDD −2 V signal range Fully specified at ±15 V, ±20 V, +12 V, and +36 V IN1 IN2 ±5 V to ±22 V dual-supply operation
Figure 1.
8 V to 44 V single-supply operation 10-lead, 3 mm × 2 mm, LFCSP APPLICATIONS Analog input and output modules COMPANION PRODUCTS Process control and distributed control systems Data acquisition Precision 24-Bit ADC: AD7768-1 Instrumentation Precision 16-Bit, 2 MSPS SAR ADC: AD4000 Avionics Automatic test equipment Communication systems Relay replacement GENERAL DESCRIPTION
The ADG5421F is a dual SPST, low on resistance switch that
PRODUCT HIGHLIGHTS
features overvoltage protection, power-off protection, and 1. Source pins are protected against voltages greater than the overvoltage detection on the source pins. supply rails, up to −60 V and +60 V in both powered and When no power supplies are present, the switch remains in the unpowered state. off condition, and the switch inputs are high impedance. When 2. Overvoltage detection with digital output indicates powered, if the analog input signal levels on either of the Sx pins operating state of switches. exceed VDD or VSS by the threshold voltage, VT, both switches 3. Trench isolation guards against latch-up. turn off together, and the open-drain fault flag (FF) pin pulls to a 4. The ADG5421F can operate from a dual supply of ±5 V up logic low. Input signal levels up to +60 V or −60 V relative to to ±22 V or a single power supply of +8 V up to +44 V. ground are blocked in both the powered and unpowered 5. Negative channel metal oxide semiconductor (NMOS) condition. only architecture requires 2 V headroom towards VDD and The switches turn on with a Logic 1 input and conduct equally provides low RON and low RON flatness across the signal wel in both directions. The digital input is compatible with range of VSS to VDD − 2 V. 1.8 V logic inputs over the full operating supply range.
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Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM COMPANION PRODUCTS PRODUCT HIGHLIGHTS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ±15 V DUAL SUPPLY ±20 V DUAL SUPPLY 12 V SINGLE SUPPLY 36 V SINGLE SUPPLY CONTINUOUS CURRENT PER CHANNEL, S OR D ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADG5421F ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS TERMINOLOGY THEORY OF OPERATION SWITCH ARCHITECTURE ESD Performance Trench Isolation OVERVOLTAGE FAULT PROTECTION Power-On Protection Power-Off Protection Overvoltage Interrupt Flag APPLICATIONS INFORMATION POWER SUPPLY RAILS POWER SUPPLY RECOMMENDATIONS POWER SUPPLY SEQUENCING PROTECTION SIGNAL RANGE INTELLIGENT FAULT DETECTION SWITCH IN A KNOWN STATE HIGH VOLTAGE SURGE SUPPRESSION RELATED PRODUCTS OUTLINE DIMENSIONS ORDERING GUIDE