Datasheet AEM00300 (E-peas) - 7
| Fabricante | E-peas |
| Descripción | Highly Versatile Buck-Boost Ambient Energy Manager Battery Charger with Source Voltage Level Configuration |
| Páginas / Página | 26 / 7 — DATASHEET. AEM00300 |
| Formato / tamaño de archivo | PDF / 768 Kb |
| Idioma del documento | Inglés |
DATASHEET. AEM00300
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DATASHEET AEM00300
NAME PIN NUMBER Function Configuration pins SRC_LVL_CFG[0] 8 SRC_LVL_CFG[1] 9 SRC_LVL_CFG[2] 11 Used for the configuration of the source voltage level. SRC_LVL_CFG[3] 20 SRC_LVL_CFG[4] 22 SRC_LVL_CFG[5] 21 STO_CFG[0] 23 STO_CFG[1] 24 Used for the configuration of the threshold voltages for the STO_CFG[2] 25 energy storage element (VOVDIS, VCHRDY and VOVCH). STO_CFG[3] 18 STO_OVCH 17 Used for the configuration of the threshold voltages (VOVDIS, VCHRDY and VOVCH) for the STO_OVDIS 15 energy storage element when STO_CFG[3:0] are set to custom mode (optional). Must be left floating if not used. STO_RDY 16 - Pul ed up to VINT: enables the charging of the storage element. EN_STO_CH 12 - Pul ed down to GND: disables the charging of the storage element. - Pul ed up to VINT: HIGH POWER MODE enabled. EN_HP 19 - Pul ed down to GND: HIGH POWER MODE disabled. Other 1, 3, 7, 27 GND Ground connection, best possible connection to PCB ground plane. Exposed pad Table 2: Configuration and Ground Pins DS D _A _ E A M0 M 030 3 0_Rev e 1.0. 0 0 Copyr y ight h © 2022 2 e-pe p as a SA S Confidential 8 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History
NAME PIN NUMBER Function Configuration pins SRC_LVL_CFG[0] 8 SRC_LVL_CFG[1] 9 SRC_LVL_CFG[2] 11 Used for the configuration of the source voltage level. SRC_LVL_CFG[3] 20 SRC_LVL_CFG[4] 22 SRC_LVL_CFG[5] 21 STO_CFG[0] 23 STO_CFG[1] 24 Used for the configuration of the threshold voltages for the STO_CFG[2] 25 energy storage element (VOVDIS, VCHRDY and VOVCH). STO_CFG[3] 18 STO_OVCH 17 Used for the configuration of the threshold voltages (VOVDIS, VCHRDY and VOVCH) for the STO_OVDIS 15 energy storage element when STO_CFG[3:0] are set to custom mode (optional). Must be left floating if not used. STO_RDY 16 - Pul ed up to VINT: enables the charging of the storage element. EN_STO_CH 12 - Pul ed down to GND: disables the charging of the storage element. - Pul ed up to VINT: HIGH POWER MODE enabled. EN_HP 19 - Pul ed down to GND: HIGH POWER MODE disabled. Other 1, 3, 7, 27 GND Ground connection, best possible connection to PCB ground plane. Exposed pad Table 2: Configuration and Ground Pins DS D _A _ E A M0 M 030 3 0_Rev e 1.0. 0 0 Copyr y ight h © 2022 2 e-pe p as a SA S Confidential 8 Document Outline Table of Contents List of Tables 1. Introduction 2. Absolute Maximum Ratings 3. Thermal Resistance 4. Typical Electrical Characteristics at 25 °C 5. Recommended Operation Conditions 6. Functional Block Diagram 7. Theory of Operation 7.1. DCDC Converter 7.2. Reset and Wake Up States 7.3. Supply State 7.4. Source Voltage Regulation 7.5. Balancing for Dual-Cell Supercapacitor 8. System Configuration 8.1. High Power / Low Power Mode 8.2. Storage Element Configuration 8.3. Custom Mode Configuration 8.4. Disable Storage Element Charging 8.5. Source Level Configuration 8.6. External Components 8.6.1. Storage element information 8.6.2. External inductor information 8.6.3. External capacitors information CSRC CINT 9. Typical Application Circuits 9.1. Example Circuit 1 9.2. Example Circuit 2 9.3. Circuit Behaviour 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.4. DCDC Conversion Efficiency From SRC to STO in Low Power Mode 9.5. DCDC Conversion Efficiency From SRC to STO in High Power Mode 10. Schematic 11. Layout 12. Package Information 12.1. Plastic Quad Flatpack No-Lead (QFN 28-pin 4x4mm) 12.2. Board Layout 13. Revision History