Datasheet MCP1502 (Microchip) - 7

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MCP1502 2.1 Terminology EQUATION 2-2:
V 2.1.1 OUTPUT VOLTAGE (V OUT OUT) -   --------- 100% % = Line Regulation V Output Voltage (V IN OUT) is the reference voltage that is available on the OUT pin. Line regulation may also be expressed as %/V or in 2.1.2 INPUT VOLTAGE (VIN) ppm/V, as shown in Equation 2-3 and Equation 2-4, respectively. The Input Voltage (VIN) is the range of voltage that can be applied to the VDD pin and still have the device
EQUATION 2-3:
produce the designated output voltage on the OUT pin. V  OUT  2.1.3 TEMPERATURE COEFFICIENT (T ------------------ C) V  OUTNOM The output Temperature Coefficient (T ---------------------  % 100% = -- Line Regulation C) or voltage drift V V is a measure of how much the output voltage will vary IN from its initial value with changes in ambient tempera- ture. The value specified in the electrical specifications
EQUATION 2-4:
is measured as shown in Equation 2-1. V  
EQUATION 2-1: T
OUT
C CALCULATION
------------------ V  OUTNOM --------------------- 106  ppm = ----- Line Regulation V  OUTMAX – VOUTMIN 6 VIN V Tc = ------   -------------------------------- 10 ppm/C T  VOUTNOM As an example, if the MCP1502-20 is implemented in a Where: design and a 2 μV change in output voltage is V measured from a 250 mV change on the input, then the OUT(MAX) = Maximum output voltage over the temperature range error in percent and ppm/volt wil be as shown in Equation 2-5 and Equation 2-6. VOUT(MIN) = Minimum output voltage over the temperature range
EQUATION 2-5:
VOUT(NOM) = Average output voltage over the  temperature range V  OUT    2 V ----------  100% ---------  100%  = .0008%    T = Temperature range over which V  IN  250 mV the data were col ected
EQUATION 2-6:
2.1.4 DROPOUT VOLTAGE (VDO)  2 V The Dropout Voltage (V --------- DO) is defined as the voltage VOUT 6 2.048V 6 ppm difference between V ----------  10 = ------------  10 = 3.90625 ------ DD and VOUT under a 5 mA load, V 250 mV   V where V IN OUT is reduced by 1% from the nominal value.   2.1.5 LINE REGULATION An ideal voltage reference wil maintain a constant output voltage, regardless of any changes to the input voltage. However, when real devices are considered, a small error may be measured on the output when an input voltage change occurs. Line regulation is defined as the change in Output Voltage (VOUT) as a function of a change in the Input Voltage (VIN), and expressed as a percentage, as shown in Equation 2-2.  2021 Microchip Technology Inc. and its subsidiaries DS20006593A-page 7 Document Outline Features Applications Related Parts General Description Package Types Block Diagram 1.0 Pin Function Table TABLE 1-1: Pin Function Table 1.1 Buffered VREF Output (OUT) 1.2 System Ground (GND) 1.3 Shutdown Pin (SHDN) 1.4 Power Supply Input (VDD) 2.0 Electrical Characteristics Absolute Maximum Ratings(†) TABLE 2-1: DC Characteristics TABLE 2-2: Temperature Specifications 2.1 Terminology 2.1.1 Output Voltage (VOUT) 2.1.2 Input Voltage (VIN) 2.1.3 Temperature Coefficient (Tc) EQUATION 2-1: TC Calculation 2.1.4 Dropout Voltage (VDO) 2.1.5 Line Regulation EQUATION 2-2: EQUATION 2-3: EQUATION 2-4: EQUATION 2-5: EQUATION 2-6: 2.1.6 Load Regulation EQUATION 2-7: EQUATION 2-8: EQUATION 2-9: EQUATION 2-10: EQUATION 2-11: 2.1.7 Power Supply Rejection Ratio (PSRR) 2.1.8 Long-Term Drift 2.1.9 Output Voltage Hysteresis 2.1.10 Layout Consideration for Load Regulation 3.0 Typical Operating Curves FIGURE 3-1: MCP1502-10 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-2: MCP1502-20 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-3: MCP1502-40 VREF Output vs. Temperature, VDD = 5.5V. FIGURE 3-4: Load Regulation vs. Temperature. FIGURE 3-5: IDD vs. Temperature. FIGURE 3-6: MCP1502 – Line Regulation vs. Temperature. FIGURE 3-7: IDD vs. VDD for All Options. FIGURE 3-8: Noise vs. Frequency, No Load, TA = +25°C. FIGURE 3-9: PSRR vs. Frequency, No Load, TA = +25°C. FIGURE 3-10: PSRR vs. Frequency, 1 kΩ Load, TA = +25°C. FIGURE 3-11: Dropout Voltage vs. Load, TA = +25°C. FIGURE 3-12: MCP1502 Tempco Distribution, No Load, VDD = 2.7V. FIGURE 3-13: MCP1502 Tempco Distribution, No Load, VDD = 5.5V. FIGURE 3-14: VOUT Drift vs. Time, TA = +25°C, No Load, 800 Units. FIGURE 3-15: MCP1502-10 VREF and Load Regulation vs. Load Current. FIGURE 3-16: MCP1502-20 VREF and Load Regulation vs. Load Current. FIGURE 3-17: MCP1502-40 VREF and Load Regulation vs. Load Current. FIGURE 3-18: MCP1502 Output Voltage Histogram, VDD = 2.7V. FIGURE 3-19: MCP1502 Output Voltage Histogram, VDD = 5.5V. FIGURE 3-20: Fast Ramp Start-up @ +25°C for All Options. FIGURE 3-21: Slow Ramp Start-up @ +25°C for All Options. FIGURE 3-22: IDD Turn-On Transient Response. FIGURE 3-23: Shutdown Low-to-High Slow Ramp Turn-On Transient Response @ +25°C for All Options. FIGURE 3-24: Load Regulation Transient Response @ +25°C for All Options. FIGURE 3-25: Line Regulation Transient Response @ +25°C for All Options. FIGURE 3-26: MCP1502-10 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-27: MCP1502-20 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-28: MCP1502-40 Transient Response vs. Capacitive Load, VDD = 5V. FIGURE 3-29: MCP1502-10 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-30: MCP1502-20 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-31: MCP1502-40 Transient Response vs. RS, VDD = 5V, CL = 4.7 nF. FIGURE 3-32: MCP1502-10 Transient Response vs. VDD, CL = 4.7 nF. FIGURE 3-33: MCP1502-20 Transient Response vs. VDD, CL = 4.7 nF. FIGURE 3-34: MCP1502-40 Transient Response vs. VDD, CL = 4.7 nF. 4.0 Theory of Operation 5.0 Application Circuits 5.1 Application Tips 5.1.1 Basic Application Circuit FIGURE 5-1: Basic Circuit Configuration. FIGURE 5-2: Output Noise Reducing Filter. EQUATION 5-1: 5.1.2 Load Capacitor 5.1.3 Printed Circuit Board Layout Considerations 5.2 Typical Applications Circuits 5.2.1 Negative Voltage Reference FIGURE 5-3: Negative Voltage Reference. 5.2.2 A/D Converter Reference FIGURE 5-4: ADC Example Circuit. FIGURE 5-5: SAR ADC Example Circuit. 6.0 Package Information 6.1 Package Markings Appendix A: Revision History Revision A (September 2021) Product Identification System Worldwide Sales and Service