Datasheet RDA5807MP (RDA Microelectronics) - 3
| Fabricante | RDA Microelectronics |
| Descripción | Single-Chip Broadcast FM Radio Tuner |
| Páginas / Página | 21 / 3 — Functional Description. 2.1. FM Receiver. 2.2. Synthesizer. 2.3. Power … |
| Revisión | 1.0 |
| Formato / tamaño de archivo | PDF / 1.1 Mb |
| Idioma del documento | Inglés |
Functional Description. 2.1. FM Receiver. 2.2. Synthesizer. 2.3. Power Supply
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RDA Microelectronics, Inc. RDA5807MP FM Tuner V1.0
2 Functional Description
LOUT I I L PGA ADC DAC Audio FMIN DSP + Core LNA - digital filter MPX decoder stereo/mono ROUT Q Q audio R Limiter PGA ADC DAC 32.768 KHz RDS VCO /RBDS Synthesizer RCLK RSSI SCLK MCU 2.7-3.3 V Interface VDD Bus SDIO LDO RDA5807MP Figure 2-1. RDA5807MP FM Tuner Block Diagram
2.1 FM Receiver
noise. The DACs convert digital audio signal to analog The receiver uses a digital low-IF architecture that and change the volume at same time. The DACs avoids the difficulties associated with direct has low-pass feature and -3dB frequency is about conversion while delivering lower solution cost 30 KHz. and reduces complexity, and integrates a low noise amplifier (LNA) supporting the FM
2.2 Synthesizer
broadcast band (50 to 115MHz), a multi-phase image-reject mixer array, a programmable gain control (PGA), a high resolution analog-to-digital The frequency synthesizer generates the local converters (ADCs), an audio DSP and a high- oscillator signal which divide to multi-phase, then fidelity digital-to-analog converters (DACs). be used to downconvert the RF input to a constant low intermediate frequency (IF). The The limiter prevents overloading and limits the synthesizer reference clock is 32.768 KHz. amount of intermodulation products created by strong adjacent channels. The synthesizer frequency is defined by bits CHAN[9:0] with the range from 50MHz to The multi-phase mixer array down converts the 115MHz. LNA output differential RF signal to low-IF, it also has image-reject function and harmonic tones rejection. The PGA amplifies the mixer output IF signal and then digitized with ADCs.
2.3 Power Supply
The DSP core finishes the channel selection, FM demodulation, stereo MPX decoder and output The RDA5807MP integrated one LDO which audio signal. The MPX decoder can autonomous supplies power to the chip. The external supply switch from stereo to mono to limit the output voltage range is 2.7-3.3 V. The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of RDA. Page 3 of 21 Document Outline General Description Features Applications Table of Contents Functional Description FM Receiver Synthesizer Power Supply RESET and Control Interface select Control Interface Electrical Characteristics Receiver Characteristics Serial Interface I2C Interface Timing Register Definition Pins Description Application Diagram Audio Loading Resistance Larger than 32Ω & Reference Clock Application: Bill of Materials: Audio Loading Resistance Larger than 32Ω & DCXO Application: Bill of Materials: Physical Dimension PCB Land Pattern Change List Contact Information
2 Functional Description
LOUT I I L PGA ADC DAC Audio FMIN DSP + Core LNA - digital filter MPX decoder stereo/mono ROUT Q Q audio R Limiter PGA ADC DAC 32.768 KHz RDS VCO /RBDS Synthesizer RCLK RSSI SCLK MCU 2.7-3.3 V Interface VDD Bus SDIO LDO RDA5807MP Figure 2-1. RDA5807MP FM Tuner Block Diagram
2.1 FM Receiver
noise. The DACs convert digital audio signal to analog The receiver uses a digital low-IF architecture that and change the volume at same time. The DACs avoids the difficulties associated with direct has low-pass feature and -3dB frequency is about conversion while delivering lower solution cost 30 KHz. and reduces complexity, and integrates a low noise amplifier (LNA) supporting the FM
2.2 Synthesizer
broadcast band (50 to 115MHz), a multi-phase image-reject mixer array, a programmable gain control (PGA), a high resolution analog-to-digital The frequency synthesizer generates the local converters (ADCs), an audio DSP and a high- oscillator signal which divide to multi-phase, then fidelity digital-to-analog converters (DACs). be used to downconvert the RF input to a constant low intermediate frequency (IF). The The limiter prevents overloading and limits the synthesizer reference clock is 32.768 KHz. amount of intermodulation products created by strong adjacent channels. The synthesizer frequency is defined by bits CHAN[9:0] with the range from 50MHz to The multi-phase mixer array down converts the 115MHz. LNA output differential RF signal to low-IF, it also has image-reject function and harmonic tones rejection. The PGA amplifies the mixer output IF signal and then digitized with ADCs.
2.3 Power Supply
The DSP core finishes the channel selection, FM demodulation, stereo MPX decoder and output The RDA5807MP integrated one LDO which audio signal. The MPX decoder can autonomous supplies power to the chip. The external supply switch from stereo to mono to limit the output voltage range is 2.7-3.3 V. The information contained herein is the exclusive property of RDA and shall not be distributed, reproduced, or disclosed in whole or in part without prior written permission of RDA. Page 3 of 21 Document Outline General Description Features Applications Table of Contents Functional Description FM Receiver Synthesizer Power Supply RESET and Control Interface select Control Interface Electrical Characteristics Receiver Characteristics Serial Interface I2C Interface Timing Register Definition Pins Description Application Diagram Audio Loading Resistance Larger than 32Ω & Reference Clock Application: Bill of Materials: Audio Loading Resistance Larger than 32Ω & DCXO Application: Bill of Materials: Physical Dimension PCB Land Pattern Change List Contact Information