Datasheet ADT7461A (ON Semiconductor) - 3
| Fabricante | ON Semiconductor |
| Descripción | +-1C Temperature Monitor with Series Resistance Cancellation |
| Páginas / Página | 19 / 3 — ADT7461A. Table 3. PIN ASSIGNMENT. Pin No. Mnemonic. Description. Table … |
| Revisión | 8 |
| Formato / tamaño de archivo | PDF / 302 Kb |
| Idioma del documento | Inglés |
ADT7461A. Table 3. PIN ASSIGNMENT. Pin No. Mnemonic. Description. Table 4. SMBus TIMING SPECIFICATIONS. Parameter
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ADT7461A Table 3. PIN ASSIGNMENT Pin No. Mnemonic Description
1 VDD Positive Supply, 3.0 V to 3.6 V. 2 D+ Positive Connection to Remote Temperature Sensor. 3 D− Negative Connection to Remote Temperature Sensor. 4 THERM Open-Drain Output. Can be used to turn a fan on/off or throttle a CPU clock in the event of an overtemperature condition. Requires pullup resistor. 5 GND Supply Ground Connection. 6 ALERT/THERM2 Open-Drain Logic Output Used as Interrupt or SMBus ALERT. This can also be configured as a second THERM output. Requires pullup resistor. 7 SDATA Logic Input/Output, SMBus Serial Data. Open-Drain Output. Requires pullup resistor. 8 SCLK Logic Input, SMBus Serial Clock. Requires pullup resistor.
Table 4. SMBus TIMING SPECIFICATIONS
(Note 1)
Parameter Limit at TMIN and TMAX Unit Description
fSCLK 400 kHz max − tLOW 1.3 ms min Clock Low Period, between 10% Points tHIGH 0.6 ms min Clock High Period, between 90% Points tR 300 ns max Clock/Data Rise Time tF 300 ns max Clock/Data Fall Time tSU; STA 600 ns min Start Condition Setup Time tHD; STA (Note 2) 600 ns min Start Condition Hold Time tSU; DAT (Note 3) 100 ns min Data Setup Time tSU; STO (Note 4) 600 ns min Stop Condition Setup Time tBUF 1.3 ms min Bus Free Time between Stop and Start Conditions 1. Guaranteed by design, but not production tested. 2. Time from 10% of SDATA to 90% of SCLK. 3. Time for 10% or 90% of SDATA to 10% of SCLK. 4. Time for 90% of SCLK to 10% of SDATA.
tF tLOW t tHD; STA R SCLK tHD; STA tHIGH tSU; STA t t t SU; STO HD; DAT SU; DAT SDATA tBUF STOP START START STOP Figure 2. Serial Bus Timing http://onsemi.com 3
ADT7461A Table 3. PIN ASSIGNMENT Pin No. Mnemonic Description
1 VDD Positive Supply, 3.0 V to 3.6 V. 2 D+ Positive Connection to Remote Temperature Sensor. 3 D− Negative Connection to Remote Temperature Sensor. 4 THERM Open-Drain Output. Can be used to turn a fan on/off or throttle a CPU clock in the event of an overtemperature condition. Requires pullup resistor. 5 GND Supply Ground Connection. 6 ALERT/THERM2 Open-Drain Logic Output Used as Interrupt or SMBus ALERT. This can also be configured as a second THERM output. Requires pullup resistor. 7 SDATA Logic Input/Output, SMBus Serial Data. Open-Drain Output. Requires pullup resistor. 8 SCLK Logic Input, SMBus Serial Clock. Requires pullup resistor.
Table 4. SMBus TIMING SPECIFICATIONS
(Note 1)
Parameter Limit at TMIN and TMAX Unit Description
fSCLK 400 kHz max − tLOW 1.3 ms min Clock Low Period, between 10% Points tHIGH 0.6 ms min Clock High Period, between 90% Points tR 300 ns max Clock/Data Rise Time tF 300 ns max Clock/Data Fall Time tSU; STA 600 ns min Start Condition Setup Time tHD; STA (Note 2) 600 ns min Start Condition Hold Time tSU; DAT (Note 3) 100 ns min Data Setup Time tSU; STO (Note 4) 600 ns min Stop Condition Setup Time tBUF 1.3 ms min Bus Free Time between Stop and Start Conditions 1. Guaranteed by design, but not production tested. 2. Time from 10% of SDATA to 90% of SCLK. 3. Time for 10% or 90% of SDATA to 10% of SCLK. 4. Time for 90% of SCLK to 10% of SDATA.
tF tLOW t tHD; STA R SCLK tHD; STA tHIGH tSU; STA t t t SU; STO HD; DAT SU; DAT SDATA tBUF STOP START START STOP Figure 2. Serial Bus Timing http://onsemi.com 3