Datasheet MAX17270, MAX17271 (Maxim) - 3

MAX17270/MAX17271 nanoPower Triple-Output, Single-Inductor, Multiple-Output (SIMO) Buck-Boost Regulator
Absolute Maximum Ratings
VPWR, OUT1, OUT2, OUT3, VIO to GND ...-0.3V to +6V EN1, EN2, EN3, IRQB, ON, RSTB, RSEL1, RSEL2, Continuous Power Dissipation (WLP) RSEL3 to GND ..-0.3V to VSUP + 0.3V (TA = 70°C, derate 17.2mW/°C above 70°C.) ...1376mW SCL, SDA to GND ..-0.3V to VVIO + 0.3V Continuous Power Dissipation (TQFN) VSUP to VPWR ..-0.3V to +0.3V (TA = 70°C, derate 20.8mW/°C above 70°C.) ..1666.7mW PGND to GND ..-0.3V to +0.3V Operating Temperature Range ... -40°C to +85°C OUT1, OUT2, OUT3 Short-Circuit Duration ..Continuous Junction Temperature ..+150°C LXA Continuous Current (Note 1) ...1.2ARMS Storage Temperature Range .. -60°C to +150°C LXB Continuous Current (Note 2) ...1.2ARMS Soldering Temperature (reflow) ...+260°C BST to LXB ..-0.3V to 6V BST to VPWR ...-0.3V to 6V Lead Temperature (soldering, 10 seconds) ...300°C
Note 1:
LXA has internal clamping diodes to PGND and VPWR. It is normal for these diodes to briefly conduct during switching events. Avoid steady-state conduction of these diodes.
Note 2:
Do not externally bias LXB. LXB has an internal low-side clamping diode to PGND, and an internal high-side clamping diode that dynamically shifts to the selected SIMO output. It is normal for these internal clamping diodes to briefly conduct during switching events. When the SIMO regulator is disabled, the LXB to PGND absolute maximum voltage is -0.3V to OUT1 + 0.3V. Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Package Information TQFN PACKAGE CODE T1633+5
Outline Number
21-0136
Land Pattern Number
90-0032 THERMAL RESISTANCE, FOUR-LAYER BOARD:
Junction to Ambient (θJA) 48°C/W Junction to Case (θJC) 10°C/W
WLP PACKAGE CODE N161A1+1
Outline Number
21-100190
Land Pattern Number Refer to
Application Note 1891 THERMAL RESISTANCE, FOUR-LAYER BOARD:
Junction to Ambient (θJA) 57.93 Junction to Case (θJC) N/A For the latest package outline information and land patterns (footprints), go to
www.maximintegrated.com/packages
. Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing pertains to the package regardless of RoHS status. Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial
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