Datasheet MASTERGAN4 (STMicroelectronics) - 9

FabricanteSTMicroelectronics
DescripciónHigh power density 600V half-bridge driver with two enhancement mode GaN HEMT
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MASTERGAN4. Device characterization values. Table 7. GaN power transistor characterization values (each transistor). Symbol

MASTERGAN4 Device characterization values Table 7 GaN power transistor characterization values (each transistor) Symbol

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MASTERGAN4 Device characterization values 5 Device characterization values
The information in Table 7 and Table 8 represent typical values based on characterization and simulation results and are not tested in production.
Table 7. GaN power transistor characterization values (each transistor) Symbol Parameter Test condition Min Typ Max Unit
VGS = 6 V, TJ = 25 °C QG Total gate charge - 1.5 - nC VDS = 0 to 400 V QOSS Output charge - 14 - nC EOSS Output Capacitance stored energy VGS = 0 V, VDS = 400 V - 1.7 - µJ COSS Output capacitance - 14.2 - pF CO(ER) Effective output capacitance energy related(1) - 21 - pF VGS = 0 V, VDS = 0 to 400 V CO(TR) Effective output capacitance time related(2) - 34 - pF QRR Reverse recovery charge - - 0 - nC IRRM Reverse recovery current - - 0 - A 1. CO(ER) is the fixed capacitance that would give the same stored energy as COSS while VDS is rising from 0 V to the stated VDS 2. CO(TR) is the fixed capacitance that would give the same charging time as COSS while VDS is rising from 0 V to the stated VDS
Table 8. Inductive load switching characteristics Symbol Parameter Test condition Min Typ Max Unit
t (1) (on) Turn-on time - 70 - ns t (2) C(on) Crossover time (on) - 25 - ns VS = 400 V, t (2) (off) Turn-off time - 70 - ns VGS = 6 V, t (1) C(off) Crossover time (off) - 10 - ns ID = 3.2 A tSD Shutdown to high/low-side propagation delay - 70 - ns See Figure 3 Eon Turn-on switching losses - 10 - µJ Eoff Turn-off switching losses - 2.5 - µJ 1. t(on) and t(off) include the propagation delay time of the internal driver and GaN Turn on time 2. tC (on) and tC (off) are the switching times of GaN transistor itself under the internally given gate driving conditions
DS13686
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Rev 1 page 9/27
Document Outline Features Applications Description 1 Block diagram 2 Pin descriptions and connection diagram 2.1 Pin list 3 Electrical Data 3.1 Absolute maximum ratings 3.2 Recommended operating conditions 3.3 Thermal data 4 Electrical characteristics 4.1 Driver 4.2 GaN power transistor 5 Device characterization values 6 Functional description 6.1 Logic inputs 6.2 Bootstrap structure 6.3 VCC supply pins and UVLO function 6.4 VBO UVLO protection 6.5 Thermal shutdown 7 Typical application diagrams 8 Package information 8.1 QFN 9 x 9 x 1 mm, 31 leads, pitch 0.6 mm package information 9 Suggested footprint 10 Ordering information Revision history