Datasheet STD30NF06LT4 (STMicroelectronics) - 8
| Fabricante | STMicroelectronics |
| Descripción | N-channel 60 V, 0.022 Ω typ., 35 A STripFET II Power MOSFET in a DPAK package |
| Páginas / Página | 19 / 8 — Test circuits. STD30NF06LT4. Figure 13. Switching times test circuit for. … |
| Formato / tamaño de archivo | PDF / 878 Kb |
| Idioma del documento | Inglés |
Test circuits. STD30NF06LT4. Figure 13. Switching times test circuit for. Figure 14. Gate charge test circuit. resistive load
Versión de texto del documento
Test circuits STD30NF06LT4 3 Test circuits Figure 13. Switching times test circuit for Figure 14. Gate charge test circuit resistive load
VDD 12V 47kΩ 1kΩ 100nF R 2200 3.3 L μF μF VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. μF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1
Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times
L A A A D FAST L=100μH VD G D.U.T. DIODE 2200 3.3 μF μF VDD S B 3.3 1000 B B μF μF 25 Ω VDD D ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
V t (BR)DSS on toff tr tf V tdon tdoff D 90% 90% IDM 10% I 10% VDS D 0 VDD VDD 90% VGS AM01472v1 10% 0 AM01473v1 8/19 DocID026310 Rev 1 Document Outline Figure 1. Internal schematic diagram Table 1. Device summary 1 Electrical ratings Table 2. Absolute maximum ratings Table 3. Thermal data Table 4. Avalanche characteristics 2 Electrical characteristics Table 5. On /off states Table 6. Dynamic Table 7. Switching times Table 8. Source drain diode 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance vs temperature Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Source-drain diode forward characteristics 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 4 Package mechanical data Figure 19. DPAK (TO-252) type A drawing Table 9. DPAK (TO-252) type A mechanical data Figure 20. DPAK (TO-252) type A footprint Figure 21. DPAK (TO-252) type C drawing Table 10. DPAK (TO-252) type C mechanical data Figure 22. DPAK (TO-252) type A footprint 5 Packaging mechanical data Figure 23. Tape for DPAK (TO-252) Figure 24. Reel for DPAK (TO-252) Table 11. DPAK (TO-252) tape and reel mechanical data 6 Revision history Table 12. Document revision history
VDD 12V 47kΩ 1kΩ 100nF R 2200 3.3 L μF μF VDD IG=CONST VD Vi=20V=VGMAX 100Ω D.U.T. VGS 2200 RG D.U.T. μF 2.7kΩ VG PW 47kΩ 1kΩ PW AM01468v1 AM01469v1
Figure 15. Test circuit for inductive load Figure 16. Unclamped inductive load test circuit switching and diode recovery times
L A A A D FAST L=100μH VD G D.U.T. DIODE 2200 3.3 μF μF VDD S B 3.3 1000 B B μF μF 25 Ω VDD D ID G RG S Vi D.U.T. Pw AM01470v1 AM01471v1
Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform
V t (BR)DSS on toff tr tf V tdon tdoff D 90% 90% IDM 10% I 10% VDS D 0 VDD VDD 90% VGS AM01472v1 10% 0 AM01473v1 8/19 DocID026310 Rev 1 Document Outline Figure 1. Internal schematic diagram Table 1. Device summary 1 Electrical ratings Table 2. Absolute maximum ratings Table 3. Thermal data Table 4. Avalanche characteristics 2 Electrical characteristics Table 5. On /off states Table 6. Dynamic Table 7. Switching times Table 8. Source drain diode 2.1 Electrical characteristics (curves) Figure 2. Safe operating area Figure 3. Thermal impedance Figure 4. Output characteristics Figure 5. Transfer characteristics Figure 6. Gate charge vs gate-source voltage Figure 7. Static drain-source on-resistance Figure 8. Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on-resistance vs temperature Figure 11. Normalized V(BR)DSS vs temperature Figure 12. Source-drain diode forward characteristics 3 Test circuits Figure 13. Switching times test circuit for resistive load Figure 14. Gate charge test circuit Figure 15. Test circuit for inductive load switching and diode recovery times Figure 16. Unclamped inductive load test circuit Figure 17. Unclamped inductive waveform Figure 18. Switching time waveform 4 Package mechanical data Figure 19. DPAK (TO-252) type A drawing Table 9. DPAK (TO-252) type A mechanical data Figure 20. DPAK (TO-252) type A footprint Figure 21. DPAK (TO-252) type C drawing Table 10. DPAK (TO-252) type C mechanical data Figure 22. DPAK (TO-252) type A footprint 5 Packaging mechanical data Figure 23. Tape for DPAK (TO-252) Figure 24. Reel for DPAK (TO-252) Table 11. DPAK (TO-252) tape and reel mechanical data 6 Revision history Table 12. Document revision history