Datasheet LT3508 (Analog Devices) - 8

LT3508
OPERATION
The LT3508 is a dual constant frequency, current mode and switches between the two modes. Unique circuitry regulator with internal power switches. Operation can be generates the appropriate slope compensation ramps best understood by referring to the Block Diagram. If the and generates the 180° out-of-phase clocks for the two SHDN pin is tied to ground, the LT3508 is shut down and channels. draws minimal current from the input source tied to the The switching regulator performs frequency foldback VIN pins. If the SHDN pin exceeds 1V, the internal bias during overload conditions. An amplifier senses when circuits turn on, including the internal regulator, reference V and oscillator. The switching regulators will only begin to FB is less than 0.625V and begins decreasing the oscil- lator frequency down from full frequency to 12% of the operate when the SHDN pin exceeds 2.63V. nominal frequency when VFB = 0V. The FB pin is less than The switcher is a current mode regulator. Instead of 0.8V during start-up, short-circuit and overload condi- directly modulating the duty cycle of the power switch, tions. Frequency foldback helps limit switch current under the feedback loop controls the peak current in the switch these conditions. during each cycle. Compared to voltage mode control, The switch driver operates either from V current mode control improves loop dynamics and IN or from the BOOST pin. An external capacitor and Schottky diode are provides cycle-by-cycle current limit. A pulse from the used to generate a voltage at the BOOST pin that is higher oscillator sets the RS flip-flop and turns on the internal than the input supply. This al ows the driver to saturate the NPN power switch. Current in the switch and the external internal bipolar NPN power switch for efficient operation. inductor begins to increase. When this current exceeds a level determined by the voltage at VC, current comparator The TRACK/SS pin serves as an alternative input to the C1 resets the flip-flop, turning off the switch. The current error amplifier. The amplifier will use the lowest voltage in the inductor flows through the external Schottky diode of either the reference of 0.8V or the voltage on the and begins to decrease. The cycle begins again at the next TRACK/SS pin as the positive input of error amplifier. pulse from the oscillator. In this way, the voltage on the Since the TRACK/SS pin is driven by a constant current VC pin controls the current through the inductor to the source, a single capacitor on the pin will generate a linear output. The internal error amplifier regulates the output ramp on the output voltage. Tying the TRACK/SS pin to a current by continually adjusting the VC pin voltage. The resistor divider from the output of one of the switching threshold for switching on the VC pin is 0.8V, and an regulators allows one output to track another. active clamp of 1.75V limits the output current. The PG output is an open-collector transistor that is off The switching frequency is set either by the resistance when the output is in regulation, allowing an external to GND at the RT/SYNC pin or the frequency of the log- resistor to pull the PG pin high. Power good is valid when ic-level signal driving the RT/SYNC pin. A detection circuit the LT3508 is enabled (SHDN is high) and VIN1 is greater monitors for the presence of a SYNC signal on the pin than 3.7V. Rev. E 8 For more information www.analog.com Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Pin Configuration Order Information Electrical Characteristics Typical Performance Characteristics Pin Functions Block Diagram Operation Applications Information Typical Applications Package Description Revision History Related Parts