Datasheet ADP5033 (Analog Devices) - 4

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ADP5033 Data Sheet BUCK1 AND BUCK2 SPECIFICATIONS
VIN1 = VIN2 = 2.3 V to 5.5 V; TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.1
Table 3. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT CHARACTERISTICS Input Voltage Range VIN1, VIN2 PWM mode, ILOAD1 = ILOAD2 = 0 mA to 800 mA 2.3 5.5 V OUTPUT CHARACTERISTICS Output Voltage Accuracy ∆VOUT1/VOUT1, ∆VOUT2/VOUT2 PWM mode; ILOAD1 = ILOAD2 = 0 mA −1.8 +1.8 % Line Regulation (∆VOUT1/VOUT1)/∆VIN1, PWM mode −0.05 %/V (∆VOUT2/VOUT2)/∆VIN2 Load Regulation (∆VOUT1/VOUT1)/∆IOUT1, ILOAD = 0 mA to 800 mA, PWM mode −0.1 %/A (∆VOUT2/VOUT2)/∆IOUT2 PSM CURRENT THRESHOLD PSM to PWM Operation IPSM 100 mA OPERATING SUPPLY CURRENT MODE = ground BUCK1 Only IIN ILOAD1 = 0 mA, device not switching, all 44 μA other channels disabled BUCK2 Only IIN ILOAD2 = 0 mA, device not switching, all 55 μA other channels disabled BUCK1 and BUCK2 IIN ILOAD1 = ILOAD2 = 0 mA, device not switching, 67 μA LDO channels disabled SW CHARACTERISTICS SW On Resistance RPFET PFET at VIN1 = 5 V 145 235 mΩ RPFET PFET at VIN1 = 3.6 V 180 295 mΩ RNFET NFET at VIN1 = 5 V 110 190 mΩ RNFET NFET at VIN1 = 3.6 V 125 220 mΩ Current Limit ILIMIT1, ILIMIT2 PFET switch peak current limit 1100 1350 mA ACTIVE PULL-DOWN RPDWN-B Channel disabled 75 Ω OSCILLATOR FREQUENCY fSW 2.5 3.0 3.5 MHz 1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
LDO1 AND LDO2 SPECIFICATIONS
VIN3 = (VOUT3 + 0.5 V) or 1.7 V (whichever is greater) to 5.5 V, VIN4 = (VOUT4 + 0.5 V) or 1.7 V (whichever is greater) to 5.5 V; CIN = COUT = 1 µF; TJ = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless otherwise noted.1
Table 4. Parameter Symbol Test Conditions/Comments Min Typ Max Unit
INPUT VOLTAGE RANGE VIN3, VIN4 1.7 5.5 V OPERATING SUPPLY CURRENT Bias Current per LDO2 IVIN3BIAS/IVIN4BIAS IOUT3 = IOUT4 = 0 µA 10 30 µA IOUT3 = IOUT4 = 10 mA 60 100 µA IOUT3 = IOUT4 = 300 mA 165 245 µA Total System Input Current IIN Includes al current into VIN1, VIN2, VIN3, and VIN4 LDO1 or LDO2 Only IOUT3 = IOUT4 = 0 µA, all other channels disabled 53 µA LDO1 and LDO2 Only IOUT3 = IOUT4 = 0 µA, buck channels disabled 74 µA OUTPUT CHARACTERISTICS Output Voltage Accuracy ∆VOUT3/VOUT3, 100 µA < IOUT3 < 300 mA, 100 µA < IOUT4 < 300 mA −1.8 +1.8 % ∆VOUT4/VOUT4 Line Regulation (∆VOUT3/VOUT3)/∆VIN3, IOUT3 = IOUT4 = 1 mA −0.03 +0.03 %/V (∆VOUT4/VOUT4)/∆VIN4 Load Regulation3 (∆VOUT3/VOUT3)/∆IOUT3, IOUT3 = IOUT4 = 1 mA to 300 mA 0.001 0.003 %/mA (∆VOUT4/VOUT4)/∆IOUT4 Rev. H | Page 4 of 28 Document Outline Features Applications Typical Application Circuit General Description Revision History Specifications General Specifications BUCK1 and BUCK2 Specifications LDO1 and LDO2 Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Typical Performance Characteristics Theory of Operation Power Management Unit Thermal Protection Undervoltage Lockout Enable/Shutdown BUCK1 and BUCK2 Control Scheme PWM Mode PSM PSM Current Threshold Oscillator/Phasing of Inductor Switching Short-Circuit Protection Soft Start Current Limit 100% Duty Operation Active Pull-Downs LDO1 and LDO2 Applications Information Buck External Component Selection Inductor Output Capacitor Input Capacitor LDO Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Power Dissipation and Thermal Considerations Buck Regulator Power Dissipation LDO Regulator Power Dissipation Junction Temperature PCB Layout Guidelines Typical Application Schematic Outline Dimensions Ordering Guide