Datasheet AD5560 (Analog Devices) - 5

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Data Sheet AD5560 SPECIFICATIONS
HCAVDDx ≤ (AVSS + 33 V), HCAVDDx ≤ AVDD, HCAVSSx ≥ AVSS, AVDD ≥ 8 V, AVSS ≤ −5 V, |AVDD − AVSS| ≥ 16 V and ≤ 33 V, DVCC = 2.3 V to 5.5 V, VREF = 5 V, gain (m), offset (c), and DAC offset registers are at default values; AGND = DGND = 0 V; TJ = 25°C to 90°C, maximum specifications, unless otherwise noted. FSV is full-scale voltage, FSVR is ful -scale voltage range, FSC is full-scale current, FSCR is ful -scale current range.
Table 1. Parameter Min Typ Max Unit Test Conditions/Comments
FORCE VOLTAGE Force Output Voltage1 EXTFORCE1 AVSS + 2.25 AVDD − 2.25 V Allow ±500 mV for external RSENSE voltage drop HCAVSS1x + 1.75 HCAVSS1x − 1.75 V Allow ±500 mV for external RSENSE voltage drop HCAVSS1x + 1.25 HCAVDD1x − 1.25 V Allow ±500 mV for external RSENSE voltage drop; reduced headroom/footroom, clamps must be enabled2 EXTFORCE2 AVSS + 2.25 AVDD − 2.25 V Allow ±500 mV for external RSENSE voltage drop HCAVSS2x + 1.75 HCAVDD2x − 1.75 V Allow ±500 mV for external RSENSE voltage drop HCAVSS2x + 1.25 HCAVDD2x − 1.25 V Allow ±500 mV for external RSENSE voltage drop; reduced headroom/footroom, clamps must be enabled2 FORCE AVSS + 2.75 AVDD − 2.75 V Internal current ranges, includes ±500 mV for internal RSENSE voltage drop Headroom/Footroom1 −2.75 +2.75 V Internal current ranges to AVDD/AVSS, includes ±500 mV for internal RSENSE voltage drop. Headroom/Footroom1 −2.25 +2.25 V External current ranges, EXTFORCE1/ EXTFORCE2 to HCAVDDx and HCAVSSx supplies; includes ±500 mV for external RSENSE voltage drop.\ Force Output Voltage Span −22 +25 V May be a skewed range but within headroom requirements and maximum power dissipation for current range Forced Voltage Linearity Error −2 +2 mV Forced Voltage Offset Error −50 +50 mV Uncalibrated, use c register to calibrate, meas- ured at midscale Forced Voltage Offset Error Tempco1 27 μV/°C Standard deviation = 23 μV/°C Forced Voltage Gain Error −25 +25 mV Uncalibrated, use m register to calibrate Forced Voltage Gain Error Tempco1 4 ppm/°C Standard deviation = 3 ppm/°C Short-Circuit Current Limit3 Clamps off EXTFORCE1 −3.5 ±2.7 +3.5 A Positive and negative dc short-circuit current EXTFORCE2 −1.25 ±0.9 +1.25 A Positive and negative dc short-circuit current FORCE −75 ±50 +75 mA ±25 mA range, positive and negative dc short- circuit current −20 ±10 +20 mA All other ranges, positive and negative dc short- circuit current Active CFx Buffer −64 +64 mA DC Load Regulation1 −1 +1 mV EXTFORCE1 range, ±1 A load current change −0.4 +0.4 mV EXTFORCE2 range, ±0.5 A load current change Load Transient Response1 70 mV 1.2 A load step into 100 μF DUT capacitance (10 mΩ ESR), autocompensation mode 140 mV 1.2 A load step into 30 µF DUT capacitance (10 mΩ ESR), autocompensation mode NSD1 350 nV/√Hz Measured at 1 kHz, at output of FORCE MEASURE CURRENT RANGES Sense resistors are trimmed to within 1%, nominal ±500 mV VRSENSE Internal Sense Resistors1 100 kΩ ±5 µA current range 20 kΩ ±25 µA current range 2 kΩ ±250 µA current range 200 Ω ±2.5 mA current range 20 Ω ±25 mA current range Rev. E | Page 5 of 66 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY FUNCTIONAL BLOCK DIAGRAM SPECIFICATIONS TIMING CHARACTERISTICS TIMING DIAGRAMS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TERMINOLOGY THEORY OF OPERATION FORCE AMPLIFIER HW_INH Function DAC REFERENCE VOLTAGE (VREF) OPEN-SENSE DETECT (OSD) ALARM AND CLAMP DEVICE UNDER TEST GROUND (DUTGND) DUTGND Kelvin Sense Kelvin Alarm (KELALM) GPO COMPARATORS CURRENT CLAMPS Clamp Alarm Function (CLALM) Clamp Enable Function (CLEN/LOAD) SHORT-CIRCUIT PROTECTION GUARD AMPLIFIER COMPENSATION CAPACITORS CURRENT RANGE SELECTION HIGH CURRENT RANGES Master and Slaves in Force Voltage (FV) Mode Master in FV Mode, Slaves in Force Current (FI) Mode IDEAL SEQUENCE FOR GANG MODE COMPENSATION FOR GANG MODE SYSTEM FORCE/SENSE SWITCHES DIE TEMPERATURE SENSOR AND THERMAL SHUTDOWN MEASURE OUTPUT (MEASOUT) VMID VOLTAGE FORCE AMPLIFIER STABILITY Safe Mode Autocompensation Mode Manual Compensation Mode POLES AND ZEROS IN A TYPICAL SYSTEM MINIMIZING THE NUMBER OF EXTERNAL COMPENSATION COMPONENTS CFx Pins CCx Pins EXTRA POLES AND ZEROS IN THE AD5560 The Effect of CCx The Effect of CFx The Effect of RZ The Effect of RP COMPENSATION STRATEGIES Ensuring Stability into an Unknown Capacitor Up to a Maximum Value OPTIMIZING PERFORMANCE FOR A KNOWN CAPACITOR USING AUTOCOMPENSATION MODE ADJUSTING THE AUTOCOMPENSATION MODE DEALING WITH PARALLEL LOAD CAPACITORS DAC LEVELS FORCE AND COMPARATOR DACS CLAMP DACS OSD DAC DUTGND DAC OFFSET DAC OFFSET AND GAIN REGISTERS Offset and Gain Registers for the Force Amplifier DAC Offset and Gain Registers for the Comparator DACs Offset and Gain Registers for the Clamp DACs REFERENCE SELECTION CALIBRATION Reducing Zero-Scale Error Reducing Gain Error Calibration Example ADDITIONAL CALIBRATION SYSTEM LEVEL CALIBRATION CHOOSING AVDD/AVSS POWER SUPPLY RAILS CHOOSING HCAVSSx AND HCAVDDx SUPPLY RAILS POWER DISSIPATION PACKAGE COMPOSITION AND MAXIMUM VERTICAL FORCE SLEW RATE CONTROL Programmable Slew Rate Ramp Function SERIAL INTERFACE SPI INTERFACE SPI WRITE MODE SDO OUTPUT FUNCTION BUSY FUNCTION LOAD FUNCTION REGISTER UPDATE RATES CONTROL REGISTERS DPS AND DAC ADDRESSING READBACK MODE DAC READBACK POWER-ON DEFAULT USING THE HCAVDDx AND HCAVSSx SUPPLIES POWER SUPPLY SEQUENCING REQUIRED EXTERNAL COMPONENTS POWER SUPPLY DECOUPLING APPLICATIONS INFORMATION THERMAL CONSIDERATIONS TEMPERATURE CONTOUR MAP ON THE TOP OF THE PACKAGE TQFP_EP Package BGA Package OUTLINE DIMENSIONS ORDERING GUIDE