Datasheet AD8307 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | Low Cost, DC to 500 MHz, 92 dB Logarithmic Amplifier |
| Páginas / Página | 24 / 3 — Data Sheet. AD8307. SPECIFICATIONS. Table 2. Parameter. Conditions. Min. … |
| Revisión | F |
| Formato / tamaño de archivo | PDF / 430 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD8307. SPECIFICATIONS. Table 2. Parameter. Conditions. Min. Typ. Max. Unit
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Data Sheet AD8307 SPECIFICATIONS
VS = 5 V, TA = 25°C, RL ≥ 1 MΩ, unless otherwise noted.
Table 2. Parameter Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS Input Range (±3 dB Error) From noise floor to maximum input 92 dB Input Range (±1 dB Error) From noise floor to maximum input 88 dB Logarithmic Conformance f ≤ 100 MHz, central 80 dB ±0.3 ±1 dB f = 500 MHz, central 75 dB ±0.5 dB Logarithmic Slope Unadjusted1 23 25 27 mV/dB vs. Temperature 23 27 mV/dB Logarithmic Intercept Sine amplitude, unadjusted2 20 μV Equivalent sine power in 50 Ω −87 −84 −77 dBm vs. Temperature −88 −76 dBm Input Noise Spectral Density Inputs shorted 1.5 nV/√Hz Operating Noise Floor RSOURCE = 50 Ω/2 −78 dBm Output Resistance Pin 4 to ground 10 12.5 15 kΩ Internal Load Capacitance 3.5 pF Response Time Small signal, 10% to 90%, 0 mV to 100 mV, CL = 2 pF 400 ns Large signal, 10% to 90%, 0 V to 2.4 V, CL = 2 pF 500 ns Upper Usable Frequency 500 MHz Lower Usable Frequency AC-coupled input 10 Hz AMPLIFIER CELL CHARACTERISTICS Cell Bandwidth −3 dB 900 MHz Cell Gain 14.3 dB INPUT CHARACTERISTICS DC Common-Mode Voltage AC-coupled input 3.2 V Common-Mode Range Either input (small signal) −0.3 +1.6 VS − 1 V DC Input Offset Voltage3 RSOURCE ≤ 50 Ω 50 500 μV Drift 0.8 μV/°C Incremental Input Resistance Differential 1.1 kΩ Input Capacitance Either pin to ground 1.4 pF Bias Current Either input 10 25 μA POWER INTERFACES Supply Voltage 2.7 5.5 V Supply Current VENB ≥ 2 V 8 10 mA Disabled VENB ≤ 1 V 150 750 μA 1 This can be adjusted downward by adding a shunt resistor from the output to ground. A 50 kΩ resistor reduces the nominal slope to 20 mV/dB. 2 This can be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V. 3 Normally nulled automatically by internal offset correction loop and can be manually nulled by a voltage applied between Pin 3 and ground; see the Applications Information section. Rev. F | Page 3 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS LOG AMP THEORY PROGRESSIVE COMPRESSION DEMODULATING LOG AMPS INTERCEPT CALIBRATION OFFSET CONTROL EXTENSION OF RANGE INTERFACES ENABLE INTERFACE INPUT INTERFACE OFFSET INTERFACE OUTPUT INTERFACE THEORY OF OPERATION BASIC CONNECTIONS INPUT MATCHING NARROW-BAND MATCHING SLOPE AND INTERCEPT ADJUSTMENTS APPLICATIONS INFORMATION BUFFERED OUTPUT FOUR-POLE FILTER 1 µW TO 1 kW 50 Ω POWER METER MEASUREMENT SYSTEM WITH 120 dB DYNAMIC RANGE OPERATION AT LOW FREQUENCIES OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet AD8307 SPECIFICATIONS
VS = 5 V, TA = 25°C, RL ≥ 1 MΩ, unless otherwise noted.
Table 2. Parameter Conditions Min Typ Max Unit
GENERAL CHARACTERISTICS Input Range (±3 dB Error) From noise floor to maximum input 92 dB Input Range (±1 dB Error) From noise floor to maximum input 88 dB Logarithmic Conformance f ≤ 100 MHz, central 80 dB ±0.3 ±1 dB f = 500 MHz, central 75 dB ±0.5 dB Logarithmic Slope Unadjusted1 23 25 27 mV/dB vs. Temperature 23 27 mV/dB Logarithmic Intercept Sine amplitude, unadjusted2 20 μV Equivalent sine power in 50 Ω −87 −84 −77 dBm vs. Temperature −88 −76 dBm Input Noise Spectral Density Inputs shorted 1.5 nV/√Hz Operating Noise Floor RSOURCE = 50 Ω/2 −78 dBm Output Resistance Pin 4 to ground 10 12.5 15 kΩ Internal Load Capacitance 3.5 pF Response Time Small signal, 10% to 90%, 0 mV to 100 mV, CL = 2 pF 400 ns Large signal, 10% to 90%, 0 V to 2.4 V, CL = 2 pF 500 ns Upper Usable Frequency 500 MHz Lower Usable Frequency AC-coupled input 10 Hz AMPLIFIER CELL CHARACTERISTICS Cell Bandwidth −3 dB 900 MHz Cell Gain 14.3 dB INPUT CHARACTERISTICS DC Common-Mode Voltage AC-coupled input 3.2 V Common-Mode Range Either input (small signal) −0.3 +1.6 VS − 1 V DC Input Offset Voltage3 RSOURCE ≤ 50 Ω 50 500 μV Drift 0.8 μV/°C Incremental Input Resistance Differential 1.1 kΩ Input Capacitance Either pin to ground 1.4 pF Bias Current Either input 10 25 μA POWER INTERFACES Supply Voltage 2.7 5.5 V Supply Current VENB ≥ 2 V 8 10 mA Disabled VENB ≤ 1 V 150 750 μA 1 This can be adjusted downward by adding a shunt resistor from the output to ground. A 50 kΩ resistor reduces the nominal slope to 20 mV/dB. 2 This can be adjusted in either direction by a voltage applied to Pin 5, with a scale factor of 8 dB/V. 3 Normally nulled automatically by internal offset correction loop and can be manually nulled by a voltage applied between Pin 3 and ground; see the Applications Information section. Rev. F | Page 3 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS LOG AMP THEORY PROGRESSIVE COMPRESSION DEMODULATING LOG AMPS INTERCEPT CALIBRATION OFFSET CONTROL EXTENSION OF RANGE INTERFACES ENABLE INTERFACE INPUT INTERFACE OFFSET INTERFACE OUTPUT INTERFACE THEORY OF OPERATION BASIC CONNECTIONS INPUT MATCHING NARROW-BAND MATCHING SLOPE AND INTERCEPT ADJUSTMENTS APPLICATIONS INFORMATION BUFFERED OUTPUT FOUR-POLE FILTER 1 µW TO 1 kW 50 Ω POWER METER MEASUREMENT SYSTEM WITH 120 dB DYNAMIC RANGE OPERATION AT LOW FREQUENCIES OUTLINE DIMENSIONS ORDERING GUIDE