Datasheet ADRF5515 (Analog Devices) - 4

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ADRF5515 Data Sheet Parameter Test Conditions/Comments Min Typ Max Unit
At ANT-CHA, ANT-CHB PD-CHAB = 0 V, BP-CHA = BP-CHB = 5 V 9 dB PAR LTE full lifetime average, 3.3 GHz to 4.0 GHz 43 dBm 7 dB PAR LTE single event (<10 sec) average1 46 dBm TCASE Range2 −40 +105 °C Junction Temperature at Maximum TCASE Receive operation3 132 °C Transmit operation3 134 °C DIGITAL INPUT SWCTRL-CHAB, PD-CHAB Low (VIL) 0 0.7 V High (VIH) 1.4 VDD V BP-CHA, BP-CHB Low (VIL) 0 0.3 V High (VIH) 1.0 VDD V SUPPLY CURRENT (IDD) VDD1-CHx and VDD2-CHx = 5 V per channel High Gain Mode 86 mA Low Gain Mode 36 mA Power-Down Mode 12 mA Transmitter Current (Switch) SWVDD-CHAB = 5 V 1.3 mA DIGITAL INPUT CURRENTS SWCTRL-CHAB, PD-CHAB, BP-CHA, BP-CHB = 5 V per channel SWCTRL-CHAB 0.084 mA PD-CHAB 0.19 mA BP-CHA, BP-CHB 0.19 mA 1 Peak power >53 dBm has not been evaluated. 2 Measured at the exposed pad. 3 See Table 5 and Table 6. Rev. 0 | Page 4 of 15 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings for ADRF5515 ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS RECEIVE OPERATION, HIGH GAIN MODE RECEIVE OPERATION, LOW GAIN MODE TRANSMIT OPERATION THEORY OF OPERATION SIGNAL PATH SELECT Transmit Operation Receive Operation BIASING SEQUENCE APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE