link to page 6 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 link to page 9 Data SheetHMC637ALP5EPIN CONFIGURATION AND FUNCTION DESCRIPTIONS12CCCCCCNINIACGACGNINININI3231302928272625NIC 124 NICVGG2 223 NICNIC 322HMC637ALP5EGNDGND 421TOP VIEWRFOUT/VDDRFIN 5(Not to Scale)20 NICNIC 619 NICNIC 718 NICNIC 817 NIC910111213141516CCCDC43NININIGNGG1NIVACGACGNOTES 1. NIC = NO INTERNAL CONNECTION. THESE PINS MAY BE CONNECTED TO 002 RF GROUND. PERFORMANCE IS NOT AFFECTED. 08- 2. EXPOSED PAD. THE EXPOSED PAD MUST BE CONNECTED TO RF/DC GROUND. 173 Figure 2. Pin Configuration Table 4. Pin Function Descriptions Pin No.MnemonicDescription1 1, 3, 6 to 11, 14, 17 to 20, 23 to 28, 31, 32 NIC No Internal Connection. These pins may be connected to RF ground. Performance is not affected. 2 VGG2 Gate Control 2 for Amplifier. Apply 5 V to VGG2 for nominal operation. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 4, 12, 22 GND Ground. Connect Pin 4, Pin 12, and Pin 22 to RF/dc ground. 5 RFIN This pad is dc-coupled and matched to 50 Ω. 13 VGG1 Gate Control 1 for Amplifier. Attach a bypass capacitor per the application circuit shown in the Applications Information section. Follow the power up and power down sequences outlines in the Applications Information section. 15 ACG4 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 16 ACG3 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 21 RFOUT/VDD RF Output/Power Supply Voltage for Amplifier. Connect the dc bias (VDD) network to provide drain current (IDD). See the application circuit shown in the Applications Information section. 29 ACG2 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. 30 ACG1 Low Frequency Termination. Attach a bypass capacitor per the application circuit shown in the Applications Information section. EPAD Exposed Pad. The exposed pad must be connected to RF/dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. C | Page 5 of 11 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Electrical Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Applications Information Evaluation PCB List of Materials for PCB EV1HMC637ALP5E Outline Dimensions Ordering Guide