Datasheet ADPA7007CHIP (Analog Devices) - 6

ADPA7007CHIP Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS VGG1 VDD1 VDD3 2 3 4 5 VREF 1 ADPA7007CHIP RFIN TOP VIEW (CIRCUIT SIDE) 6 RFOUT 7 VDET 10 9 8
002
VGG2 VDD2 VDD4
21924- Figure 2. Pin Configuration
Table 8. Pin Function Descriptions Pin No. Mnemonic Description
1 RFIN RF Signal Input. This pad is ac-coupled and matched to 50 Ω. 2, 10 VGG1, VGG2 Amplifier Gate Controls. External bypass capacitors of 4.7 µF, 0.01 µF, and 100 pF are required for these pads. ESD protection diodes are included and turn on below −1.5 V. 3, 4, 8, 9, VDD1, VDD3, VDD4, VDD2 Drain Biases for the Amplifier. External bypass capacitors of 4.7 µF, 0.01 µF, and 100 pF are required for these pads. 5 VREF Reference Diode Voltage. Use this pad for temperature compensation of the VDET RF output power measurements. Used in combination with VDET, this voltage provides temperature compensation to the VDET RF output power measurements. 6 RFOUT RF Signal Output. This pad is ac-coupled and matched to 50 Ω. 7 VDET Detector Diode Used for Measuring the RF Output Power. Detection via this pad requires the application of a dc bias voltage through an external series resistor. Used in combination with VREF, the difference voltage, VREF − VDET, is a temperature compensated dc voltage proportional to the RF output power. Die Bottom GND Die bottom must be connected to RF and dc ground. Rev. 0 | Page 6 of 25 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS 18 GHz TO 22 GHz FREQUENCY RANGE 22 GHz TO 36 GHz FREQUENCY RANGE 36 GHz TO 44 GHz FREQUENCY RANGE ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ELECTROSTATIC DISCHARGE (ESD) RATINGS ESD Ratings ADPA7007CHIP ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS INTERFACE SCHEMATICS TYPICAL PERFORMANCE CHARACTERISTICS CONSTANT IDD OPERATION THEORY OF OPERATION APPLICATIONS INFORMATION MOUNTING AND BONDING TECHNIQUES FOR MILLIMETERWAVE GAAS MMICS Handling Precautions Mounting Wire Bonding BIASING ADPA7007CHIP WITH THE HMC980LP4E APPLICATION CIRCUIT SETUP LIMITING VGATE FOR ADPA7007CHIP VGGx ABSOLUTE MAXIMUM RATING REQUIREMENT HMC980LP4E BIAS SEQUENCE Power-Up Sequence Power-Down Sequence CONSTANT DRAIN CURRENT BIASING vs. CONSTANT GATE VOLTAGE BIASING TYPICAL APPLICATION CIRCUIT ASSEMBLY DIAGRAM OUTLINE DIMENSIONS ORDERING GUIDE