Datasheet HMC1049LP5E (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | GaAs, pHEMT, MMIC, Low Noise Amplifier, 0.3 GHz to 20 GHz |
| Páginas / Página | 14 / 5 — Data Sheet. HMC1049LP5E. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. … |
| Revisión | B |
| Formato / tamaño de archivo | PDF / 333 Kb |
| Idioma del documento | Inglés |
Data Sheet. HMC1049LP5E. PIN CONFIGURATION AND FUNCTION DESCRIPTIONS. ACG. NC 1. 24 NC. 23 NC. NC 3. 22 GND. GND 4. 21 RFOUT/V. RFIN 5. 20 NC
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Data Sheet HMC1049LP5E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 NC NC ACG NC NC NC NC NC 32 31 30 29 28 27 26 25 NC 1 24 NC V 2 23 NC DD NC 3 22 GND GND 4 21 RFOUT/V HMC1049LP5E DD RFIN 5 20 NC TOP VIEW NC 6 (Not to Scale) 19 NC NC 7 18 NC NC 8 17 NC 9 10 11 12 13 14 15 16 3 2 NC NC NC NC GG NC V ACG ACG NOTES 1. NC = NO CONNECT. THESE PINS ARE NOT CONNECTED INTERNALLY; HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF/DC GROUND EXTERNALLY.
004
2. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF/DC GROUND.
16798- Figure 2. Pin Configuration Diagram
Table 4. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 12, 14, 17 to NC No Connect. These pins are not connected internally; however, all data was measured with these pins 20, 23 to 29, 31, 32 connected to RF/dc ground externally (see the Typical Performance Characteristics section for data plots). 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. 2 VDD Power Supply Voltage for the Amplifier. External bypass capacitors (100 pF and 0.01 μF) are required. 30 ACG1 Low Frequency Termination. An external bypass capacitor of 100 pF is required. 21 RFOUT/VDD RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to 50 Ω. 15, 16 ACG2, Low Frequency Termination. External bypass capacitors of 100 pF are required. ACG3 13 VGG Gate Control for Amplifier. Adjust the voltage to achieve IDD = 70 mA. External bypass capacitors of 100 pF, 0.01 μF, and 4.7μF are required. 4, 22 GND Ground. Connect Pin 4 and Pin 22 to RF/dc ground. 0 EP Exposed Pad. The exposed ground paddle must be connected to RF/dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. B | Page 5 of 14 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Evaluation Printed Circuit Board Packaging and Ordering Information Outline Dimensions Ordering Guide
Data Sheet HMC1049LP5E PIN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 NC NC ACG NC NC NC NC NC 32 31 30 29 28 27 26 25 NC 1 24 NC V 2 23 NC DD NC 3 22 GND GND 4 21 RFOUT/V HMC1049LP5E DD RFIN 5 20 NC TOP VIEW NC 6 (Not to Scale) 19 NC NC 7 18 NC NC 8 17 NC 9 10 11 12 13 14 15 16 3 2 NC NC NC NC GG NC V ACG ACG NOTES 1. NC = NO CONNECT. THESE PINS ARE NOT CONNECTED INTERNALLY; HOWEVER, ALL DATA WAS MEASURED WITH THESE PINS CONNECTED TO RF/DC GROUND EXTERNALLY.
004
2. EXPOSED PAD. THE EXPOSED GROUND PADDLE MUST BE CONNECTED TO RF/DC GROUND.
16798- Figure 2. Pin Configuration Diagram
Table 4. Pin Function Descriptions Pin No. Mnemonic Description1
1, 3, 6 to 12, 14, 17 to NC No Connect. These pins are not connected internally; however, all data was measured with these pins 20, 23 to 29, 31, 32 connected to RF/dc ground externally (see the Typical Performance Characteristics section for data plots). 5 RFIN RF Input. This pin is dc-coupled and matched to 50 Ω. 2 VDD Power Supply Voltage for the Amplifier. External bypass capacitors (100 pF and 0.01 μF) are required. 30 ACG1 Low Frequency Termination. An external bypass capacitor of 100 pF is required. 21 RFOUT/VDD RF Output/Alternate Power Supply Voltage for the Amplifier. An external bias tee is required when used as alternative VDD. This pin is dc-coupled and matched to 50 Ω. 15, 16 ACG2, Low Frequency Termination. External bypass capacitors of 100 pF are required. ACG3 13 VGG Gate Control for Amplifier. Adjust the voltage to achieve IDD = 70 mA. External bypass capacitors of 100 pF, 0.01 μF, and 4.7μF are required. 4, 22 GND Ground. Connect Pin 4 and Pin 22 to RF/dc ground. 0 EP Exposed Pad. The exposed ground paddle must be connected to RF/dc ground. 1 See the Interface Schematics section for pin interfaces. Rev. B | Page 5 of 14 Document Outline Features Applications Functional Block Diagram General Description Revision History Specifications Absolute Maximum Ratings ESD Caution Pin Configuration and Function Descriptions Interface Schematics Typical Performance Characteristics Evaluation Printed Circuit Board Packaging and Ordering Information Outline Dimensions Ordering Guide