Datasheet ADCA3952 (Analog Devices) - 3
| Fabricante | Analog Devices |
| Descripción | DOCSIS 3.1, Power Doubler Hybrid Module, 45 MHz to 1218 MHz |
| Páginas / Página | 12 / 3 — Data Sheet. ADCA3952. SPECIFICATIONS GENERAL PERFORMANCE. Table 1. … |
| Formato / tamaño de archivo | PDF / 336 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADCA3952. SPECIFICATIONS GENERAL PERFORMANCE. Table 1. Parameter. Symbol Min. Typ. Max Unit Test Conditions/Comments
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Data Sheet ADCA3952 SPECIFICATIONS GENERAL PERFORMANCE
Supply voltage (VCC) = 24 V, flange temperature (TFLANGE) = 35°C, source impedance (ZS) = load impedance (ZL) = 75 Ω, and IADJ (Pin 4) floating, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
POWER GAIN S21 23.5 dB Frequency = 45 MHz 25.0 dB Frequency = 1218 MHz SLOPE STRAIGHT LINE1 1.0 dB Frequency = 45 MHz to 1218 MHz FLATNESS OF FREQUENCY RESPONSE2 0.6 dB Frequency = 45 MHz to 1218 MHz REVERSE ISOLATION S12 −28 dB Frequency = 45 MHz to 1218 MHz RETURN LOSS See Figure 3 and Figure 6 Input S11 −20 dB Frequency = 45 MHz to 320 MHz −18 dB Frequency = 320 MHz to 640 MHz −18 dB Frequency = 640 MHz to 870 MHz −18 dB Frequency = 870 MHz to 1000 MHz −16 dB Frequency = 1000 MHz to 1218 MHz Output S22 −20 dB Frequency = 45 MHz to 320 MHz −20 dB Frequency = 320 MHz to 640 MHz −20 dB Frequency = 640 MHz to 870 MHz −20 dB Frequency = 870 MHz to 1000 MHz −18 dB Frequency = 1000 MHz to 1218 MHz NOISE FIGURE 3 dB Frequency = 45 MHz 4 dB Frequency = 1218 MHz SUPPLY See the Applications Information section for adjusting the bias current and impact on performance Maximum Operating Voltage VCC 24 26 V DC Current (Total) ICC (TOTAL) 250 470 490 mA 1 Slope straight line is defined as the delta between the gain at the start frequency and the gain at the stop frequency. 2 Flatness of frequency response is defined as the delta between the gain at any frequency between the start and stop frequencies and a straight line reference drawn between the gain at the start frequency and the gain at the stop frequency. Rev. 0 | Page 3 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA (40 MHz TO 550 MHz), ERROR RATES, AND TOTAL COMPOSITE POWER ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS S-PARAMETERS 9 dB TILT PERFORMANCE THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE
Data Sheet ADCA3952 SPECIFICATIONS GENERAL PERFORMANCE
Supply voltage (VCC) = 24 V, flange temperature (TFLANGE) = 35°C, source impedance (ZS) = load impedance (ZL) = 75 Ω, and IADJ (Pin 4) floating, unless otherwise noted.
Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments
POWER GAIN S21 23.5 dB Frequency = 45 MHz 25.0 dB Frequency = 1218 MHz SLOPE STRAIGHT LINE1 1.0 dB Frequency = 45 MHz to 1218 MHz FLATNESS OF FREQUENCY RESPONSE2 0.6 dB Frequency = 45 MHz to 1218 MHz REVERSE ISOLATION S12 −28 dB Frequency = 45 MHz to 1218 MHz RETURN LOSS See Figure 3 and Figure 6 Input S11 −20 dB Frequency = 45 MHz to 320 MHz −18 dB Frequency = 320 MHz to 640 MHz −18 dB Frequency = 640 MHz to 870 MHz −18 dB Frequency = 870 MHz to 1000 MHz −16 dB Frequency = 1000 MHz to 1218 MHz Output S22 −20 dB Frequency = 45 MHz to 320 MHz −20 dB Frequency = 320 MHz to 640 MHz −20 dB Frequency = 640 MHz to 870 MHz −20 dB Frequency = 870 MHz to 1000 MHz −18 dB Frequency = 1000 MHz to 1218 MHz NOISE FIGURE 3 dB Frequency = 45 MHz 4 dB Frequency = 1218 MHz SUPPLY See the Applications Information section for adjusting the bias current and impact on performance Maximum Operating Voltage VCC 24 26 V DC Current (Total) ICC (TOTAL) 250 470 490 mA 1 Slope straight line is defined as the delta between the gain at the start frequency and the gain at the stop frequency. 2 Flatness of frequency response is defined as the delta between the gain at any frequency between the start and stop frequencies and a straight line reference drawn between the gain at the start frequency and the gain at the stop frequency. Rev. 0 | Page 3 of 12 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION FUNCTIONAL BLOCK DIAGRAM TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS GENERAL PERFORMANCE DISTORTION DATA (40 MHz TO 550 MHz), ERROR RATES, AND TOTAL COMPOSITE POWER ABSOLUTE MAXIMUM RATINGS ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS S-PARAMETERS 9 dB TILT PERFORMANCE THEORY OF OPERATION APPLICATIONS INFORMATION OUTLINE DIMENSIONS ORDERING GUIDE