PRELIMINARYQPC1251QBROADBAND HIGH LINEARITY e-CALL ANTENNA ROUTING SWITCHPower on Sequence It is very important that the user adheres to the correct timing sequences in order to avoid damaging the device. Figures are NOT drawn to scale. VIO DetailVIO OFFVIO Power Up 1. Once VIO is powered down to 0V, wait a VIO minimum of 10 µs to reapply power to VIO. (see >10 ms Figure: Digital Supply Detail) Figure: Digital Supply Detail Digital Signal / RF Power on 2. VIO must be applied for a minimum of 120 ns Dig. Sig.Dig. Sig.VIO ONRF on before sending SDATA/SCLK to ensure correct startstop data transmission. (see Figure: RF Power-Up VIO Detail) SCLK 3. VIO must be applied for a minimum of 15 µs >120 ns before applying RF power. (see Figure: Digital SDATA Signal / RF Power-On Detail) RF Power 4. Wait a minimum of 5 µs after RFFE bus is idle to >5 ms apply an RF signal. (see Figure: RF Power-Up >15 ms Detail) Figure: Digital Signal / RF Power-On Detail Switch event 5. RF power must not be applied during switching Dig. Sig.Dig. Sig. events. To ensure this, remove RF power before RF onstartstop completing a register write that will change the switch mode. (see Figure: Switch Event Timing) SCLKSDATARF Power >5 ms Figure: Switch Event Timing Low Power Mode ExitInitiateExit LowVIO ONLow Power ModePower ModeRF onVIO 6. If “Low Power Mode” is utilized, there must be a SCLK delay of 10 µs before exiting “Low Power Mode”. >120 ns (see Figure: Low-Power Mode Exit Timimg) SDATA >10 ms RF Power >15 ms Figure: Low-Power Mode Exit Timing QPC1251Q Preliminary DS JUN7,2020 | Subject to change without notice 10 of 17 www.qorvo.com