Datasheet PIC18F24/25K42 (Microchip)

PIC18F24/25K42 28-Pin, Low-Power High-Performance High-Temperature Microcontrollers Description
The PIC18F24/25K42 microcontrollers are available in 28-pin devices. These devices feature a 12-bit ADC with Computation (ADC2) automating Capacitive Voltage Divider (CVD) techniques for advanced touch sensing, averaging, filtering, oversampling and threshold comparison, Temperature Sensor, Vectored Interrupt Controller with fixed latency for handling interrupts, System Bus Arbiter, Direct Memory Access capabilities, UART with support for Asynchronous, DMX, DALI and LIN transmissions, SPI, I2C, memory features like Memory Access Partition (MAP) to support customers in data protection and bootloader applications, and Device Information Area (DIA) which stores factory calibration values to help improve temperature sensor accuracy.
Core Features Memory
• C Compiler Optimized RISC Architecture • Up to 128 KB Flash Program Memory • Operating Speed: • Up to 8 KB Data SRAM Memory - Up to 64 MHz clock input • Up to 1 KB Data EEPROM • Memory Access Partition (MAP): - 62.5 ns minimum instruction cycle - Configurable boot and app region sizes with • Two Direct Memory Access (DMA) Controllers: individual write-protections - Data transfers to SFR/GPR spaces from • Programmable Code Protection either Program Flash Memory, Data • Device Information Area (DIA) stores: EEPROM or SFR/GPR spaces - Unique IDs and Device IDs - User-programmable source and destination - Temp Sensor factory-calibrated data sizes - Fixed Voltage Reference calibrated data - Hardware and software-triggered data • Device Configuration Information (DCI) Stores: transfers - Erase row size • System Bus Arbiter with User-Configurable - Number of write latches per row Priorities for Scanner and DMA1/DMA2 with - Number of user rows Respect to the Main Line and Interrupt Execution - Data EEPROM memory size • Vectored Interrupt Capability: - Pin count - Selectable high/low priority - Fixed interrupt latency
Operating Characteristics
- Programmable vector table base address • 31-Level Deep Hardware Stack • Operating Voltage Range: • Low-Current Power-on Reset (POR) - 2.7V to 5.5V • Configurable Power-up Timer (PWRT) • Temperature Range: • Brown-out Reset (BOR) - High-Temp: -40°C to 150°C • Low-Power BOR (LPBOR) Option • Windowed Watchdog Timer (WWDT):
Power-Saving Functionality
- Variable prescaler selection - Variable window size selection • Doze mode: Ability to run CPU core slower than - Configurable in hardware or software the system clock • Idle mode: Ability to halt CPU core while internal peripherals continue operating • Sleep mode: Lowest power consumption • Peripheral Module Disable (PMD): - Ability to disable unused peripherals to minimize power consumption  2020 Microchip Technology Inc. DS40002113A-page 1 Document Outline Description Family Types Table of Contents 1.0 Device Overview 2.0 Electrical Characteristics TABLE 2-1: Supply Voltage (High Temperature) FIGURE 2-1: Voltage-Frequency Graph, -40°C £ Ta £ +150°C TABLE 2-2: DC Characteristics: Supply Current (Idd)(1,2) TABLE 2-3: DC Characteristics: Power-Down Currents (Ipd)(1,2,3) TABLE 2-4: Memory Specifications (150°C) TABLE 2-5: Internal Oscillator Parameters(1) FIGURE 3-2: Precision-Calibrated HFINTOSC Frequency Accuracy Over Device Vdd and Temperature TABLE 2-6: Reset, Watchdog Timer, Oscillator Start-up Timer, Power-up Timer, Brown-out Timer and Low-Power Brown-out Reset Specifications TABLE 2-7: High/Low-Voltage Detect Characteristics TABLE 2-8: Fixed Voltage Reference (FVR) Specifications Appendix A: Revision History Product ID System Trademarks Worldwide Sales