CIPOS Maxi IM828. The CIPOS Maxi IM828 product group offers the chance for integrating various power and control components to increase reliability, optimize PCB size and system costs.
CIPOS™ Maxi IM828IM828-XCCPin configurationPin numberPin namePin description 16 VSS Low side control negative supply 17 VTH Thermistor therminal 18 NW W-phase low side source 19 NV V-phase low side source 20 NU U-phase low side source 21 W Motor W-phase output 22 V Motor V-phase output 23 U Motor U-phase output 24 P Positive bus input voltage 2.2Pin description The integrated gate driver provides additionally a HIN(U, V, W) and LIN(U, V, W) (Low side and high shoot through prevention capability which avoids side control pins, Pin 7 - 12) the simultaneous on-state of two gate drivers of the These pins are positive logic and they are same leg (i.e. HO1 and LO1, HO2 and LO2, HO3 and responsible for the control of the integrated LO3). When two inputs of a same leg are activated, MOSFETs. The schmitt-trigger input thresholds of only former activated one is activated so that the leg them are such to guarantee LSTTL and CMOS is kept steadily in a safe state. compatibility down to 3.3 V controller outputs. Pull- A minimum deadtime insertion of typically 300 ns is down resistor of about 5 k is internally provided to also provided by driver IC, in order to reduce cross- pre-bias inputs during supply start-up. Input conduction of the external power switches. schmitt-trigger and noise filter provide beneficial noise rejection to short input pulses. RFE (Fault / Fault clear time / Enable, Pin 14) The noise filter suppresses control pulses which are The RFE pin conbines three functions in one pin: below the filter time tFIL,IN. The filter acts according to programmable fault clear time by RC-network, fault- Figure 4. out and enable input. The programmable fault-clear time can be adjusted IM828 by RC network, which is external pull-up resistor and Schmitt-Trigger capacitor. For example, typical value is about 1ms at HINx INPUT NOISE LINx 1 Mand 2 nF. FILTER 5 k SWITCH LEVEL VSS V The fault-out indicates a module failure in case of IH; VIL under voltage at pin VDD or in case of triggered over Figure 3Input pin structure current detection at ITRIP. The microcontroller can pull this pin low to disable a) t b) t FIL,IN FIL,IN the IPM functionality. This is enable function. HIN HIN LIN LIN Bi-direction IM828 high Schmitt-Trigger HO HO LO low LO NOISE FILTER Figure 4Input filter timing diagram RFE From ITRIP - Latch It is not recommended for proper work to provide 1 VSS R From UV detection input pulse-width lower than 1 µs. ON,FLT Figure 5Internal circuit at pin RFE Datasheet 5 of 23 V 2.0 2020-09-03