Datasheet ADP1882, ADP1883 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | Synchronous Current-Mode with Constant On-Time, PWM Buck Controller |
| Páginas / Página | 40 / 5 — ADP1882/ADP1883. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 2. … |
| Formato / tamaño de archivo | PDF / 2.0 Mb |
| Idioma del documento | Inglés |
ADP1882/ADP1883. ABSOLUTE MAXIMUM RATINGS. THERMAL RESISTANCE. Table 2. Parameter Rating. Table 3. Thermal Resistance
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ADP1882/ADP1883 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VDD to GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN to PGND −0.3 V to +28 V
Table 3. Thermal Resistance
FB, COMP/EN to GND −0.3 V to (VDD + 0.3 V)
Package Type θ 1 JA Unit
DRVL to PGND −0.3 V to (VDD + 0.3 V) θJA (10-Lead MSOP) SW to PGND −2.0 V to +28 V 2-Layer Board 213.1 °C/W BST to SW −0.8 V to (VDD + 0.3 V) 4-Layer Board 171.7 °C/W BST to PGND −0.3 V to 28 V DRVH to SW −0.3 V to VDD 1 θJA is specified for the worst-case conditions; that is, θJA is specified for device PGND to GND ± soldered in a circuit board for surface-mount packages. 0.3 V θJA (10-Lead MSOP)
BOUNDARY CONDITION
2-Layer Board 213.1°C/W 4-Layer Board 171.7°C/W In determining the values given in Table 2 and Table 3, natural Operating Junction Temperature Range −40°C to +125°C convection was used to transfer heat to a 4-layer evaluation board. Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Maximum Soldering Lead Temperature 300°C (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. 0 | Page 5 of 40 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE BOUNDARY CONDITION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ADP1882/ADP1883 BLOCK DIAGRAM THEORY OF OPERATION STARTUP SOFT START PRECISION ENABLE CIRCUITRY UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN PROGRAMMING RESISTOR (RES) DETECT CIRCUIT VALLEY CURRENT-LIMIT SETTING HICCUP MODE DURING SHORT CIRCUIT SYNCHRONOUS RECTIFIER POWER SAVING MODE (PSM) VERSION (ADP1883) TIMER OPERATION PSEUDO-FIXED FREQUENCY APPLICATIONS INFORMATION FEEDBACK RESISTOR DIVIDER INDUCTOR SELECTION OUTPUT RIPPLE VOLTAGE (ΔVRR) OUTPUT CAPACITOR SELECTION COMPENSATION NETWORK Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency EFFICIENCY CONSIDERATIONS Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss INPUT CAPACITOR SELECTION THERMAL CONSIDERATIONS DESIGN EXAMPLE Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations EXTERNAL COMPONENT RECOMMENDATIONS LAYOUT CONSIDERATIONS IC SECTION (LEFT SIDE OF EVALUATION BOARD) POWER SECTION DIFFERENTIAL SENSING TYPICAL APPLICATIONS CIRCUITS DUAL-INPUT, 300 kHz HIGH CURRENT APPLICATIONS CIRCUIT SINGLE-INPUT, 600 kHz APPLICATIONS CIRCUIT DUAL-INPUT, 300 kHz HIGH CURRENT APPLICATIONS CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE
ADP1882/ADP1883 ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 2. Parameter Rating
θJA is specified for the worst-case conditions, that is, a device VDD to GND −0.3 V to +6 V soldered in a circuit board for surface-mount packages. VIN to PGND −0.3 V to +28 V
Table 3. Thermal Resistance
FB, COMP/EN to GND −0.3 V to (VDD + 0.3 V)
Package Type θ 1 JA Unit
DRVL to PGND −0.3 V to (VDD + 0.3 V) θJA (10-Lead MSOP) SW to PGND −2.0 V to +28 V 2-Layer Board 213.1 °C/W BST to SW −0.8 V to (VDD + 0.3 V) 4-Layer Board 171.7 °C/W BST to PGND −0.3 V to 28 V DRVH to SW −0.3 V to VDD 1 θJA is specified for the worst-case conditions; that is, θJA is specified for device PGND to GND ± soldered in a circuit board for surface-mount packages. 0.3 V θJA (10-Lead MSOP)
BOUNDARY CONDITION
2-Layer Board 213.1°C/W 4-Layer Board 171.7°C/W In determining the values given in Table 2 and Table 3, natural Operating Junction Temperature Range −40°C to +125°C convection was used to transfer heat to a 4-layer evaluation board. Storage Temperature Range −65°C to +150°C Soldering Conditions JEDEC J-STD-020
ESD CAUTION
Maximum Soldering Lead Temperature 300°C (10 sec) Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute maximum ratings apply individually only, not in combination. Unless otherwise specified, all other voltages are referenced to PGND. Rev. 0 | Page 5 of 40 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATIONS CIRCUIT GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE BOUNDARY CONDITION ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS ADP1882/ADP1883 BLOCK DIAGRAM THEORY OF OPERATION STARTUP SOFT START PRECISION ENABLE CIRCUITRY UNDERVOLTAGE LOCKOUT THERMAL SHUTDOWN PROGRAMMING RESISTOR (RES) DETECT CIRCUIT VALLEY CURRENT-LIMIT SETTING HICCUP MODE DURING SHORT CIRCUIT SYNCHRONOUS RECTIFIER POWER SAVING MODE (PSM) VERSION (ADP1883) TIMER OPERATION PSEUDO-FIXED FREQUENCY APPLICATIONS INFORMATION FEEDBACK RESISTOR DIVIDER INDUCTOR SELECTION OUTPUT RIPPLE VOLTAGE (ΔVRR) OUTPUT CAPACITOR SELECTION COMPENSATION NETWORK Output Filter Impedance (ZFILT) Error Amplifier Output Impedance (ZCOMP) Error Amplifier Gain (GM) Current-Sense Loop Gain (GCS) Crossover Frequency EFFICIENCY CONSIDERATIONS Channel Conduction Loss MOSFET Driver Loss Switching Loss Diode Conduction Loss Inductor Loss INPUT CAPACITOR SELECTION THERMAL CONSIDERATIONS DESIGN EXAMPLE Input Capacitor Inductor Current Limit Programming Output Capacitor Feedback Resistor Network Setup Compensation Network Loss Calculations EXTERNAL COMPONENT RECOMMENDATIONS LAYOUT CONSIDERATIONS IC SECTION (LEFT SIDE OF EVALUATION BOARD) POWER SECTION DIFFERENTIAL SENSING TYPICAL APPLICATIONS CIRCUITS DUAL-INPUT, 300 kHz HIGH CURRENT APPLICATIONS CIRCUIT SINGLE-INPUT, 600 kHz APPLICATIONS CIRCUIT DUAL-INPUT, 300 kHz HIGH CURRENT APPLICATIONS CIRCUIT OUTLINE DIMENSIONS ORDERING GUIDE