Datasheet LTC7802 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | 40V Low IQ, 3MHz Dual, 2-Phase Synchronous Step-Down Controller with Spread Spectrum |
| Páginas / Página | 34 / 9 — PIN FUNCTIONS. SW1, SW2 (Pins 22,14):. RUN1, RUN2 (Pins 5,6):. TG1, TG2 … |
| Formato / tamaño de archivo | PDF / 3.1 Mb |
| Idioma del documento | Inglés |
PIN FUNCTIONS. SW1, SW2 (Pins 22,14):. RUN1, RUN2 (Pins 5,6):. TG1, TG2 (Pins 23,13):. PGOOD1, PGOOD2 (Pins 24,12):
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PIN FUNCTIONS
Tying this pin to INTVCC forces continuous inductor cur- INTVCC pins and the BOOST2 and INTVCC pins. Voltage rent operation. Tying this pin to INTVCC through a 100k swing at the BOOST pins is from INTVCC to (VIN + INTVCC). resistor selects pulse-skipping operation.
SW1, SW2 (Pins 22,14):
Switch Node Connections to
RUN1, RUN2 (Pins 5,6):
Run Control Inputs for Each Inductors. Controller. Forcing either of these pins below 1.1V disables
TG1, TG2 (Pins 23,13):
High Current Gate Drives for Top switching of the corresponding controller. Forcing both of N Channel MOSFETs. These are the outputs of floating these pins below 0.7V shuts down the entire LTC7802, drivers with a voltage swing of INTVCC superimposed on reducing quiescent current to approximately 1.5µA. These the switch node voltage SW. pins can be tied to VIN for always-on operation. Do not float the RUN pins.
PGOOD1, PGOOD2 (Pins 24,12):
Open-Drain Power Good Outputs. The VFB1,2 pins are monitored to ensure
INTVCC (Pin 17):
Output of the Internal 5.1V Low Dropout that VOUT1,2 are in regulation. When VOUT is not within Regulator. The driver and control circuits are powered by ±10% of its regulation point, the corresponding PGOOD this supply. Must be decoupled to ground with a minimum pin is pulled low. of 4.7μF ceramic or tantalum capacitor.
TRACK/SS1, TRACK/SS2 (Pins 26,11):
External Tracking
EXTVCC (Pin 18):
External Power Input to an Internal LDO and Soft-Start Input. The LTC7802 regulates the VFB1,2 Connected to INTVCC. This LDO supplies INTVCC power, voltage to the lesser of 0.8V or the voltage on the TRACK/ bypassing the internal LDO powered from VIN whenever SS1,2 pin. Internal 12.5µA pull-up current sources are EXTVCC is higher than 4.7V. See INTVCC Regulators in the connected to these pins. A capacitor to ground sets the Applications Information section. Do not exceed 30V on start-up ramp time to the final regulated output voltage. this pin. Connect this pin to ground if the EXTVCC LDO The ramp time is equal to 0.65ms for every 10nF of capac- is not used. itance. Alternatively, a resistor divider on another voltage
VIN (Pin 19):
Main Bias Input Supply Pin. A bypass capac- supply connected to the TRACK/SS pins allows the itor should be tied between this pin and GND. LTC7802 output to track the other supply during start-up.
PLLIN/SPREAD (Pin 25):
External Synchronization Input
ITH1, ITH2 (Pins 27,10):
Error Amplifier Outputs and and Spread Spectrum Selection. When an external clock Switching Regulator Compensation Points. Each asso- is applied to this pin, the phase-locked loop will force the ciated channel’s current comparator trip point increases rising TG1 signal to be synchronized with the rising edge with this control voltage. Place compensation compo- of the external clock. When an external clock is present, the nents between the ITH pins and ground. regulators operate in pulse-skipping mode if it is selected
VFB1, VFB2 (Pins 28,9):
Controller Feedback Inputs. by the MODE pin, or in forced continuous mode otherwise. Connect an external resistor divider between the output When not synchronizing to an external clock, tie this input voltage and the VFB pin to set the regulated output voltage. to INTVCC to enable spread spectrum dithering of the oscil- Tie VFB2 to INTVCC to configure the channels for a 2-phase lator or to ground to disable spread spectrum. single output application, in which both channels share
BG1, BG2 (Pins 20,16):
High Current Gate Drives for VFB1, ITH1, and TRACK/SS1. Bottom (Synchronous) N-Channel MOSFETs. Voltage
GND (Exposed Pad Pin 29):
Ground. Connects to the swing at these pins is from ground to INTVCC. sources of the bottom N-Channel MOSFETs and the (–)
BOOST1, BOOST2 (Pins 21,15):
Bootstrapped Supplies to terminal(s) of decoupling capacitors. The exposed pad the Top Side Floating Drivers. Connect capacitors between must be soldered to PCB ground for rated electrical and the corresponding BOOST and SW pins for each channel. thermal performance. Also connect Schottky diodes between the BOOST1 and Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts
PIN FUNCTIONS
Tying this pin to INTVCC forces continuous inductor cur- INTVCC pins and the BOOST2 and INTVCC pins. Voltage rent operation. Tying this pin to INTVCC through a 100k swing at the BOOST pins is from INTVCC to (VIN + INTVCC). resistor selects pulse-skipping operation.
SW1, SW2 (Pins 22,14):
Switch Node Connections to
RUN1, RUN2 (Pins 5,6):
Run Control Inputs for Each Inductors. Controller. Forcing either of these pins below 1.1V disables
TG1, TG2 (Pins 23,13):
High Current Gate Drives for Top switching of the corresponding controller. Forcing both of N Channel MOSFETs. These are the outputs of floating these pins below 0.7V shuts down the entire LTC7802, drivers with a voltage swing of INTVCC superimposed on reducing quiescent current to approximately 1.5µA. These the switch node voltage SW. pins can be tied to VIN for always-on operation. Do not float the RUN pins.
PGOOD1, PGOOD2 (Pins 24,12):
Open-Drain Power Good Outputs. The VFB1,2 pins are monitored to ensure
INTVCC (Pin 17):
Output of the Internal 5.1V Low Dropout that VOUT1,2 are in regulation. When VOUT is not within Regulator. The driver and control circuits are powered by ±10% of its regulation point, the corresponding PGOOD this supply. Must be decoupled to ground with a minimum pin is pulled low. of 4.7μF ceramic or tantalum capacitor.
TRACK/SS1, TRACK/SS2 (Pins 26,11):
External Tracking
EXTVCC (Pin 18):
External Power Input to an Internal LDO and Soft-Start Input. The LTC7802 regulates the VFB1,2 Connected to INTVCC. This LDO supplies INTVCC power, voltage to the lesser of 0.8V or the voltage on the TRACK/ bypassing the internal LDO powered from VIN whenever SS1,2 pin. Internal 12.5µA pull-up current sources are EXTVCC is higher than 4.7V. See INTVCC Regulators in the connected to these pins. A capacitor to ground sets the Applications Information section. Do not exceed 30V on start-up ramp time to the final regulated output voltage. this pin. Connect this pin to ground if the EXTVCC LDO The ramp time is equal to 0.65ms for every 10nF of capac- is not used. itance. Alternatively, a resistor divider on another voltage
VIN (Pin 19):
Main Bias Input Supply Pin. A bypass capac- supply connected to the TRACK/SS pins allows the itor should be tied between this pin and GND. LTC7802 output to track the other supply during start-up.
PLLIN/SPREAD (Pin 25):
External Synchronization Input
ITH1, ITH2 (Pins 27,10):
Error Amplifier Outputs and and Spread Spectrum Selection. When an external clock Switching Regulator Compensation Points. Each asso- is applied to this pin, the phase-locked loop will force the ciated channel’s current comparator trip point increases rising TG1 signal to be synchronized with the rising edge with this control voltage. Place compensation compo- of the external clock. When an external clock is present, the nents between the ITH pins and ground. regulators operate in pulse-skipping mode if it is selected
VFB1, VFB2 (Pins 28,9):
Controller Feedback Inputs. by the MODE pin, or in forced continuous mode otherwise. Connect an external resistor divider between the output When not synchronizing to an external clock, tie this input voltage and the VFB pin to set the regulated output voltage. to INTVCC to enable spread spectrum dithering of the oscil- Tie VFB2 to INTVCC to configure the channels for a 2-phase lator or to ground to disable spread spectrum. single output application, in which both channels share
BG1, BG2 (Pins 20,16):
High Current Gate Drives for VFB1, ITH1, and TRACK/SS1. Bottom (Synchronous) N-Channel MOSFETs. Voltage
GND (Exposed Pad Pin 29):
Ground. Connects to the swing at these pins is from ground to INTVCC. sources of the bottom N-Channel MOSFETs and the (–)
BOOST1, BOOST2 (Pins 21,15):
Bootstrapped Supplies to terminal(s) of decoupling capacitors. The exposed pad the Top Side Floating Drivers. Connect capacitors between must be soldered to PCB ground for rated electrical and the corresponding BOOST and SW pins for each channel. thermal performance. Also connect Schottky diodes between the BOOST1 and Rev. 0 For more information www.analog.com 9 Document Outline Features Applications Typical Application Description Absolute Maximum Ratings Order Information Pin Configuration Electrical Characteristics Typical Performance Characteristics Pin Functions Functional Diagram Operation Applications Information Typical Applications Package Description Typical Application Related Parts