Datasheet BLF989E, BLF989ES (Ampleon) - 2
| Fabricante | Ampleon |
| Descripción | UHF power LDMOS transistor |
| Páginas / Página | 12 / 2 — BLF989E; BLF989ES. UHF power LDMOS transistor. 2. Pinning. information. … |
| Formato / tamaño de archivo | PDF / 1.2 Mb |
| Idioma del documento | Inglés |
BLF989E; BLF989ES. UHF power LDMOS transistor. 2. Pinning. information. Table 2. Pinning. Pin. Description. Simplified outline
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BLF989E; BLF989ES UHF power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF989E (SOT539A)
1 drain1 (peak) 1 2 1 2 drain2 (main) 3 gate1 (peak) 5 3 4 gate2 (main) 3 4 5 4 5 source [1] 2 sym117
BLF989ES (SOT539B)
1 drain1 (peak) 1 2 1 2 drain2 (main) 3 gate1 (peak) 5 3 4 gate2 (main) 3 4 5 4 5 source [1] 2 sym117 [1] Connected to flange.
3. Ordering information Table 3. Ordering information Type number Package Name Description Version
BLF989E - flanged balanced ceramic package; 2 mounting holes; 4 leads SOT539A BLF989ES - earless flanged balanced ceramic package; 4 leads SOT539B
4. Limiting values Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS(amp)main main amplifier drain-source voltage - 108 V VDS(amp)peak peak amplifier drain-source voltage - 108 V VGS(amp)main main amplifier gate-source voltage 6 +11 V VGS(amp)peak peak amplifier gate-source voltage 6 +11 V Tstg storage temperature 65 +150 C Tj junction temperature [1] - 225 C [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator. BLF989E_BLF989ES All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2020. All rights reserved.
Product data sheet Rev. 1 — 3 April 2020 2 of 12
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Test information 7.1 Ruggedness in Doherty operation 7.2 Test circuit 7.3 Graphs 7.3.1 DVB-T in production test circuit 8. Package outline 9. Handling information 10. Abbreviations 11. Revision history 12. Legal information 12.1 Data sheet status 12.2 Definitions 12.3 Disclaimers 12.4 Licenses 12.5 Trademarks 13. Contact information 14. Contents
BLF989E; BLF989ES UHF power LDMOS transistor 2. Pinning information Table 2. Pinning Pin Description Simplified outline Graphic symbol BLF989E (SOT539A)
1 drain1 (peak) 1 2 1 2 drain2 (main) 3 gate1 (peak) 5 3 4 gate2 (main) 3 4 5 4 5 source [1] 2 sym117
BLF989ES (SOT539B)
1 drain1 (peak) 1 2 1 2 drain2 (main) 3 gate1 (peak) 5 3 4 gate2 (main) 3 4 5 4 5 source [1] 2 sym117 [1] Connected to flange.
3. Ordering information Table 3. Ordering information Type number Package Name Description Version
BLF989E - flanged balanced ceramic package; 2 mounting holes; 4 leads SOT539A BLF989ES - earless flanged balanced ceramic package; 4 leads SOT539B
4. Limiting values Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter Conditions Min Max Unit
VDS(amp)main main amplifier drain-source voltage - 108 V VDS(amp)peak peak amplifier drain-source voltage - 108 V VGS(amp)main main amplifier gate-source voltage 6 +11 V VGS(amp)peak peak amplifier gate-source voltage 6 +11 V Tstg storage temperature 65 +150 C Tj junction temperature [1] - 225 C [1] Continuous use at maximum temperature will affect the reliability, for details refer to the online MTF calculator. BLF989E_BLF989ES All information provided in this document is subject to legal disclaimers. © Ampleon Netherlands B.V. 2020. All rights reserved.
Product data sheet Rev. 1 — 3 April 2020 2 of 12
Document Outline 1. Product profile 1.1 General description 1.2 Features and benefits 1.3 Applications 2. Pinning information 3. Ordering information 4. Limiting values 5. Thermal characteristics 6. Characteristics 7. Test information 7.1 Ruggedness in Doherty operation 7.2 Test circuit 7.3 Graphs 7.3.1 DVB-T in production test circuit 8. Package outline 9. Handling information 10. Abbreviations 11. Revision history 12. Legal information 12.1 Data sheet status 12.2 Definitions 12.3 Disclaimers 12.4 Licenses 12.5 Trademarks 13. Contact information 14. Contents