Datasheet OP467 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | Quad Precision, High Speed Operational Amplifier |
| Páginas / Página | 20 / 5 — OP467. WAFER TEST LIMITS1. Table 3. Parameter. Symbol. Conditions. Limit. … |
| Revisión | I |
| Formato / tamaño de archivo | PDF / 493 Kb |
| Idioma del documento | Inglés |
OP467. WAFER TEST LIMITS1. Table 3. Parameter. Symbol. Conditions. Limit. Unit
Línea de modelo para esta hoja de datos
Versión de texto del documento
link to page 20 link to page 5 link to page 5
OP467 WAFER TEST LIMITS1
@ VS = ±15.0 V, TA = 25°C, unless otherwise noted.
Table 3. Parameter Symbol Conditions Limit Unit
Offset Voltage VOS ±0.5 mV max Input Bias Current IB VCM = 0 V 600 nA max Input Offset Current IOS VCM = 0 V 100 nA max Input Voltage Range2 ±12 V min/max Common-Mode Rejection Ratio CMRR VCM = ±12 V 80 dB min Power Supply Rejection Ratio PSRR V = ±4.5 V to ±18 V 96 dB min Large Signal Voltage Gain AVO RL = 2 kΩ 83 dB min Output Voltage Range VO RL = 2 kΩ ±13.0 V min Supply Current ISY VO = 0 V, RL = ∞ 10 mA max 1 Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult sales to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 2 Guaranteed by CMR test. Rev. * | Page 5 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS WAFER TEST LIMITS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE DICE CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OUTPUT SHORT-CIRCUIT PERFORMANCE UNUSED AMPLIFIERS PCB LAYOUT CONSIDERATIONS GROUNDING POWER SUPPLY CONSIDERATIONS SIGNAL CONSIDERATIONS PHASE REVERSAL SATURATION RECOVERY TIME HIGH SPEED INSTRUMENTATION AMPLIFIER 2 MHz BIQUAD BAND-PASS FILTER FAST I-TO-V CONVERTER OP467 SPICE MARCO-MODEL OUTLINE DIMENSIONS ORDERING GUIDE
OP467 WAFER TEST LIMITS1
@ VS = ±15.0 V, TA = 25°C, unless otherwise noted.
Table 3. Parameter Symbol Conditions Limit Unit
Offset Voltage VOS ±0.5 mV max Input Bias Current IB VCM = 0 V 600 nA max Input Offset Current IOS VCM = 0 V 100 nA max Input Voltage Range2 ±12 V min/max Common-Mode Rejection Ratio CMRR VCM = ±12 V 80 dB min Power Supply Rejection Ratio PSRR V = ±4.5 V to ±18 V 96 dB min Large Signal Voltage Gain AVO RL = 2 kΩ 83 dB min Output Voltage Range VO RL = 2 kΩ ±13.0 V min Supply Current ISY VO = 0 V, RL = ∞ 10 mA max 1 Electrical tests and wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed for standard product dice. Consult sales to negotiate specifications based on dice lot qualifications through sample lot assembly and testing. 2 Guaranteed by CMR test. Rev. * | Page 5 of 20 Document Outline FEATURES APPLICATIONS GENERAL DESCRIPTION PIN CONFIGURATIONS TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ELECTRICAL CHARACTERISTICS WAFER TEST LIMITS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE DICE CHARACTERISTICS ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATIONS INFORMATION OUTPUT SHORT-CIRCUIT PERFORMANCE UNUSED AMPLIFIERS PCB LAYOUT CONSIDERATIONS GROUNDING POWER SUPPLY CONSIDERATIONS SIGNAL CONSIDERATIONS PHASE REVERSAL SATURATION RECOVERY TIME HIGH SPEED INSTRUMENTATION AMPLIFIER 2 MHz BIQUAD BAND-PASS FILTER FAST I-TO-V CONVERTER OP467 SPICE MARCO-MODEL OUTLINE DIMENSIONS ORDERING GUIDE