Datasheet ADA4860-1 (Analog Devices) - 10
| Fabricante | Analog Devices |
| Descripción | High Speed, Low Cost, Op Amp |
| Páginas / Página | 20 / 10 — ADA4860-1. 1.5. 4.0. VS = ±5V. S = +5V. 1.0. 3.5. 0.5. 3.0. A = 0V. T V. … |
| Formato / tamaño de archivo | PDF / 691 Kb |
| Idioma del documento | Inglés |
ADA4860-1. 1.5. 4.0. VS = ±5V. S = +5V. 1.0. 3.5. 0.5. 3.0. A = 0V. T V. O = 5. 2.5. O , –V. T ±V. T 5V. U =. –0.5. 2.0. TP +V. –1.0. G = +1. G = +2. VOUT = 2V p-p
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ADA4860-1 1.5 4.0 1.5 4.0 VS = ±5V V VS = ±5V V S = +5V S = +5V 1.0 3.5 1.0 3.5 ) ) ) ) V V V V ( 0.5 3.0 ( ( 0.5 3.0 ( E E E E G G G G A A = 0V A A = 0V T V T S T V T S L L L L O = 5 0 2.5 O , –V O = 5 0 2.5 O , –V V S V V S V T ±V T 5V T ±V T 5V U U = U U = S S TP –0.5 2.0 TP +V TP –0.5 2.0 TP +V OU OU OU OU –1.0 G = +1 1.5 –1.0 G = +2 1.5 VOUT = 2V p-p VOUT = 2V p-p
36 23 0
RF = 550Ω
0
R
9-
F = RG = 499Ω
9-
TIME = 5ns/DIV
70
TIME = 5ns/DIV
70
–1.5 1.0
05
–1.5 1.0
05 Figure 28. Large Signal Transient Response for Various Supplies Figure 31. Large Signal Transient Response for Various Supplies
1.5 1.5 CL = 9pF C C L = 6pF L = 9pF CL = 6pF 1.0 1.0 ) C ) V L = 4pF CL = 4pF ( V 0.5 ( E 0.5 E G G A T A L T L O 0 O 0 V T V T U U TP –0.5 TP –0.5 OU OU VS = ±5V VS = ±5V –1.0 G = +1 –1.0 G = +2 VOUT = 2V p-p V
37
OUT = 2V p-p
0 24
R
0 9-
F = 550Ω R
9-
F = RG = 499Ω
70
TIME = 5ns/DIV
70
–1.5 TIME = 5ns/DIV
05
–1.5
05 Figure 29. Large Signal Transient Response for Various Capacitor Loads Figure 32. Large Signal Transient Response for Various Capacitor Loads
4.0 4.0 CL = 9pF C C L = 9pF C L = 6pF L = 6pF 3.5 3.5 C ) CL = 4pF ) L = 4pF V V ( 3.0 ( 3.0 E E G G A A T T L L O 2.5 O 2.5 V V T T U U TP 2.0 TP 2.0 OU OU V V S = 5V S = 5V 1.5 G = +1 1.5 G = +2 V V OUT = 2V p-p
39
OUT = 2V p-p
25 0 0
R R
9-
F = 550Ω
9-
F = RG = 499Ω
70
TIME = 5ns/DIV
70
TIME = 5ns/DIV 1.0
05 05
1.0
Figure 30. Large Signal Transient Response for Various Capacitor Loads Figure 33. Large Signal Transient Response for Various Capacitor Loads Rev. 0 | Page 10 of 20 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATION INFORMATION POWER SUPPLY BYPASSING FEEDBACK RESISTOR SELECTION DRIVING CAPACITIVE LOADS POWER DOWN PIN VIDEO AMPLIFIER SINGLE-SUPPLY OPERATION OPTIMIZING FLATNESS AND BANDWIDTH LAYOUT AND CIRCUIT BOARD PARASITICS OUTLINE DIMENSIONS ORDERING GUIDE
36 23 0
RF = 550Ω
0
R
9-
F = RG = 499Ω
9-
TIME = 5ns/DIV
70
TIME = 5ns/DIV
70
–1.5 1.0
05
–1.5 1.0
05 Figure 28. Large Signal Transient Response for Various Supplies Figure 31. Large Signal Transient Response for Various Supplies
1.5 1.5 CL = 9pF C C L = 6pF L = 9pF CL = 6pF 1.0 1.0 ) C ) V L = 4pF CL = 4pF ( V 0.5 ( E 0.5 E G G A T A L T L O 0 O 0 V T V T U U TP –0.5 TP –0.5 OU OU VS = ±5V VS = ±5V –1.0 G = +1 –1.0 G = +2 VOUT = 2V p-p V
37
OUT = 2V p-p
0 24
R
0 9-
F = 550Ω R
9-
F = RG = 499Ω
70
TIME = 5ns/DIV
70
–1.5 TIME = 5ns/DIV
05
–1.5
05 Figure 29. Large Signal Transient Response for Various Capacitor Loads Figure 32. Large Signal Transient Response for Various Capacitor Loads
4.0 4.0 CL = 9pF C C L = 9pF C L = 6pF L = 6pF 3.5 3.5 C ) CL = 4pF ) L = 4pF V V ( 3.0 ( 3.0 E E G G A A T T L L O 2.5 O 2.5 V V T T U U TP 2.0 TP 2.0 OU OU V V S = 5V S = 5V 1.5 G = +1 1.5 G = +2 V V OUT = 2V p-p
39
OUT = 2V p-p
25 0 0
R R
9-
F = 550Ω
9-
F = RG = 499Ω
70
TIME = 5ns/DIV
70
TIME = 5ns/DIV 1.0
05 05
1.0
Figure 30. Large Signal Transient Response for Various Capacitor Loads Figure 33. Large Signal Transient Response for Various Capacitor Loads Rev. 0 | Page 10 of 20 Document Outline FEATURES APPLICATIONS PIN CONFIGURATION GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Maximum Power Dissipation ESD CAUTION TYPICAL PERFORMANCE CHARACTERISTICS APPLICATION INFORMATION POWER SUPPLY BYPASSING FEEDBACK RESISTOR SELECTION DRIVING CAPACITIVE LOADS POWER DOWN PIN VIDEO AMPLIFIER SINGLE-SUPPLY OPERATION OPTIMIZING FLATNESS AND BANDWIDTH LAYOUT AND CIRCUIT BOARD PARASITICS OUTLINE DIMENSIONS ORDERING GUIDE