Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 8
| Fabricante | Analog Devices |
| Descripción | Dual, Low Noise, 1 GHz FastFET Op Amplifier |
| Páginas / Página | 31 / 8 — ADA4817-1/. ADA4817-2. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 3. … |
| Revisión | G |
| Formato / tamaño de archivo | PDF / 632 Kb |
| Idioma del documento | Inglés |
ADA4817-1/. ADA4817-2. Data Sheet. ABSOLUTE MAXIMUM RATINGS Table 3. Parameter. Rating. THERMAL RESISTANCE. 3.5. Table 4. Package Type
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ADA4817-1/ ADA4817-2 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3.
2 ( ) V V = × + V P V I S × OUT – OUT D S S (2)
Parameter Rating
2 L R L R Supply Voltage 10.6 V Consider root mean square (rms) output voltages. If RL is Power Dissipation See Figure 4 referenced to −VS, as in single-supply operation, the total drive Common-Mode Input Voltage Range −VS − 0.5 V to +VS + 0.5 V power is VS × IOUT. If the rms signal levels are indeterminate, Differential Input Voltage ±VS consider the worst-case scenario, when VOUT = VS/4 for RL to Storage Temperature Range −65°C to +125°C midsupply. Operating Temperature Range −40°C to +105°C 2 Lead Temperature (Soldering, 10 sec) 300°C V D P ( S V IS ) ( S/4) = × + (3) Junction Temperature 150°C L R Stresses at or above those listed under Absolute Maximum In single-supply operation with RL referenced to −VS, the worst- Ratings may cause permanent damage to the product. This is a case situation is VOUT = VS/2. stress rating only; functional operation of the product at these Airflow increases heat dissipation, effectively reducing θJA. More or any other conditions above those indicated in the operational metal directly in contact with the package leads and exposed section of this specification is not implied. Operation beyond pad from metal traces, through holes, ground, and power the maximum operating conditions for extended periods may planes also reduces θJA. affect product reliability. Figure 4 shows the maximum safe power dissipation in the
THERMAL RESISTANCE
package vs. the ambient temperature for the exposed paddle Thermal performance is directly linked to PCB design and 8-lead LFCSP (single 94°C/W), 8-lead SOIC (single 79°C/W), operating environment. Careful attention to PCB thermal and 16-lead LFCSP (dual 64°C/W) packages on JEDEC design is required. standard 4-layer boards. θJA values are approximations.
3.5 Table 4. Package Type θ ) 3.0 JA θJC Unit (W ADA4817-2, LFCSP
CP-8-13 94 29 °C/W
N IO T 2.5
RD-8-1 79 29 °C/W
ADA4817-1, SOIC PA
CP-16-20 64 14 °C/W
ISSI 2.0 D MAXIMUM SAFE POWER DISSIPATION ER W 1.5 ADA4817-1, LFCSP
The maximum safe power dissipation for the ADA4817-1/
M PO
ADA4817-2 is limited by the associated rise in junction
1.0 MU XI
temperature (TJ) on the die. At approximately 150°C (which is
MA 0.5
the glass transition temperature), the properties of the plastic change. Even temporarily exceeding this temperature limit may
0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
008 change the stresses that the package exerts on the die, permanently
AMBIENT TEMPERATURE (°C)
07756- shifting the parametric performance of the ADA4817-1/ Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for ADA4817-2. Exceeding a junction temperature of 150°C for an a 4-Layer Board extended period can result in changes in silicon devices,
ESD CAUTION
potential y causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ADA4817-1/ADA4817-2 drive at the output. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). PD = Quiescent Power + (Total Drive Power − Load Power) (1) Rev. G | Page 8 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE
ADA4817-1/ ADA4817-2 Data Sheet ABSOLUTE MAXIMUM RATINGS Table 3.
2 ( ) V V = × + V P V I S × OUT – OUT D S S (2)
Parameter Rating
2 L R L R Supply Voltage 10.6 V Consider root mean square (rms) output voltages. If RL is Power Dissipation See Figure 4 referenced to −VS, as in single-supply operation, the total drive Common-Mode Input Voltage Range −VS − 0.5 V to +VS + 0.5 V power is VS × IOUT. If the rms signal levels are indeterminate, Differential Input Voltage ±VS consider the worst-case scenario, when VOUT = VS/4 for RL to Storage Temperature Range −65°C to +125°C midsupply. Operating Temperature Range −40°C to +105°C 2 Lead Temperature (Soldering, 10 sec) 300°C V D P ( S V IS ) ( S/4) = × + (3) Junction Temperature 150°C L R Stresses at or above those listed under Absolute Maximum In single-supply operation with RL referenced to −VS, the worst- Ratings may cause permanent damage to the product. This is a case situation is VOUT = VS/2. stress rating only; functional operation of the product at these Airflow increases heat dissipation, effectively reducing θJA. More or any other conditions above those indicated in the operational metal directly in contact with the package leads and exposed section of this specification is not implied. Operation beyond pad from metal traces, through holes, ground, and power the maximum operating conditions for extended periods may planes also reduces θJA. affect product reliability. Figure 4 shows the maximum safe power dissipation in the
THERMAL RESISTANCE
package vs. the ambient temperature for the exposed paddle Thermal performance is directly linked to PCB design and 8-lead LFCSP (single 94°C/W), 8-lead SOIC (single 79°C/W), operating environment. Careful attention to PCB thermal and 16-lead LFCSP (dual 64°C/W) packages on JEDEC design is required. standard 4-layer boards. θJA values are approximations.
3.5 Table 4. Package Type θ ) 3.0 JA θJC Unit (W ADA4817-2, LFCSP
CP-8-13 94 29 °C/W
N IO T 2.5
RD-8-1 79 29 °C/W
ADA4817-1, SOIC PA
CP-16-20 64 14 °C/W
ISSI 2.0 D MAXIMUM SAFE POWER DISSIPATION ER W 1.5 ADA4817-1, LFCSP
The maximum safe power dissipation for the ADA4817-1/
M PO
ADA4817-2 is limited by the associated rise in junction
1.0 MU XI
temperature (TJ) on the die. At approximately 150°C (which is
MA 0.5
the glass transition temperature), the properties of the plastic change. Even temporarily exceeding this temperature limit may
0 –40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
008 change the stresses that the package exerts on the die, permanently
AMBIENT TEMPERATURE (°C)
07756- shifting the parametric performance of the ADA4817-1/ Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for ADA4817-2. Exceeding a junction temperature of 150°C for an a 4-Layer Board extended period can result in changes in silicon devices,
ESD CAUTION
potential y causing degradation or loss of functionality. The power dissipated in the package (PD) is the sum of the quiescent power dissipation and the power dissipated in the die due to the ADA4817-1/ADA4817-2 drive at the output. The quiescent power is the voltage between the supply pins (VS) multiplied by the quiescent current (IS). PD = Quiescent Power + (Total Drive Power − Load Power) (1) Rev. G | Page 8 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE