Datasheet ADA4817-1, ADA4817-2 (Analog Devices) - 5

FabricanteAnalog Devices
DescripciónDual, Low Noise, 1 GHz FastFET Op Amplifier
Páginas / Página31 / 5 — Data Sheet. ADA4817-1. /ADA4817-2. SPECIFICATIONS ±5 V OPERATION. Table …
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Data Sheet. ADA4817-1. /ADA4817-2. SPECIFICATIONS ±5 V OPERATION. Table 1. Parameter. Test Conditions/Comments. Min. Typ. Max. Unit

Data Sheet ADA4817-1 /ADA4817-2 SPECIFICATIONS ±5 V OPERATION Table 1 Parameter Test Conditions/Comments Min Typ Max Unit

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Data Sheet ADA4817-1 /ADA4817-2 SPECIFICATIONS ±5 V OPERATION
TA = 25°C, +VS = 5 V, −VS = −5 V, G = 1, RF = 348 Ω for G > 1, RL = 100 Ω to ground, unless otherwise noted.
Table 1. Parameter Test Conditions/Comments Min Typ Max Unit
DYNAMIC PERFORMANCE −3 dB Bandwidth VOUT = 0.1 V p-p 1050 MHz VOUT = 2 V p-p 200 MHz VOUT = 0.1 V p-p, G = 2 390 MHz Gain Bandwidth Product VOUT = 0.1 V p-p ≥410 MHz Full Power Bandwidth VIN = 3.3 V p-p, G = 2 60 MHz 0.1 dB Flatness VOUT = 2 V p-p, RL = 100 Ω, G = 2 60 MHz Slew Rate VOUT = 4 V step 870 V/µs Settling Time to 0.1% VOUT = 2 V step, G = 2 9 ns NOISE/HARMONIC PERFORMANCE Harmonic Distortion f = 1 MHz VOUT = 2 V p-p, RL = 1 kΩ HD2 −113 dBc HD3 −117 dBc f = 10 MHz VOUT = 2 V p-p, RL = 1 kΩ HD2 −90 dBc HD3 −94 dBc f = 50 MHz VOUT = 2 V p-p, RL = 1 kΩ HD2 −64 dBc HD3 −66 dBc Input Voltage Noise f = 100 kHz 4 nV/√Hz Input Current Noise f = 100 kHz 2.5 fA/√Hz DC PERFORMANCE Input Offset Voltage 0.4 2 mV TMIN to TMAX, SOIC 6 mV TMIN to TMAX, LFCSP 4 mV Input Offset Voltage Drift TMIN to TMAX, SOIC 25 80 µV/°C TMIN to TMAX, LFCSP 10 50 µV/°C Input Bias Current 2 20 pA TMIN to TMAX 75 135 pA Input Bias Offset Current 1 10 pA TMIN to TMAX 110 pA Open-Loop Gain 62 65 dB INPUT CHARACTERISTICS Input Resistance Common mode 500 GΩ Input Capacitance Common mode 1.3 pF Differential mode 0.1 pF Input Common-Mode Voltage Range −VS to (+VS − 2.8) V Common-Mode Rejection VCM = ±0.5 V −77 −90 dB VCM = ±0.5 V, TMIN to TMAX −73 dB VCM = −4.2 V to 2.2 V, TMIN to TMAX −65 dB OUTPUT CHARACTERISTICS Output Overdrive Recovery Time VIN = ±2.5 V, G = 2 8 ns Rev. G | Page 5 of 31 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAMS TABLE OF CONTENTS REVISION HISTORY GENERAL DESCRIPTION SPECIFICATIONS ±5 V OPERATION 5 V OPERATION ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE MAXIMUM SAFE POWER DISSIPATION ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS TEST CIRCUITS THEORY OF OPERATION CLOSED-LOOP FREQUENCY RESPONSE NONINVERTING CLOSED-LOOP FREQUENCY RESPONSE INVERTING CLOSED-LOOP FREQUENCY RESPONSE WIDEBAND OPERATION DRIVING CAPACITIVE LOADS THERMAL CONSIDERATIONS POWER-DOWN OPERATION CAPACITIVE FEEDBACK HIGHER FREQUENCY ATTENUATION LAYOUT, GROUNDING, AND BYPASSING CONSIDERATIONS SIGNAL ROUTING POWER SUPPLY BYPASSING GROUNDING EXPOSED PAD LEAKAGE CURRENTS INPUT CAPACITANCE INPUT-TO-INPUT/OUTPUT COUPLING APPLICATIONS INFORMATION LOW DISTORTION PINOUT WIDEBAND PHOTODIODE PREAMP HIGH SPEED JFET INPUT INSTRUMENTATION AMPLIFIER ACTIVE LOW-PASS FILTER (LPF) OUTLINE DIMENSIONS ORDERING GUIDE