Datasheet ISL9122A (Renesas) - 3
| Fabricante | Renesas |
| Descripción | Ultra-Low IQ Buck-Boost Regulator with Bypass |
| Páginas / Página | 21 / 3 — Overview. 1.1. Block Diagram. LX1. LX2. VIN. VOUT. GND. Overcurrent. … |
| Formato / tamaño de archivo | PDF / 902 Kb |
| Idioma del documento | Inglés |
Overview. 1.1. Block Diagram. LX1. LX2. VIN. VOUT. GND. Overcurrent. Hysteretic PWM. Controller. SDA. Undervoltage. SCL. Digital Core. VREF
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ISL9122A 1. Overview
1. Overview 1.1 Block Diagram LX1 LX2 VIN VOUT ` GND GND Overcurrent Hysteretic PWM Controller SDA Undervoltage SCL Digital Core EN VREF Over-Temperature Figure 3. Block Diagram
FN8947 Rev.1.00 Page 3 of 20 Sep.14.20 Document Outline Features Applications Related Literature Contents 1. Overview 1.1 Block Diagram 1.2 Ordering Information 1.3 Pin Configurations 1.4 Pin Descriptions 2. Specifications 2.1 Absolute Maximum Ratings 2.2 Thermal Information 2.3 Recommended Operation Conditions 2.4 Analog Specifications 2.5 I2C Interface Timing Specifications 3. Typical Performance Curves 4. Functional Description 4.1 Enable Input 4.2 Soft Discharge 4.3 Start-Up 4.4 Overcurrent/Short-Circuit Protection 4.5 Thermal Shutdown 4.6 Buck-Boost Conversion Topology 4.7 PWM Operation 4.8 PFM Operation 4.9 Operation With VIN Close to VOUT 4.10 Forced Operating Modes 4.11 I2C Serial Interface 4.12 Protocol Conventions 4.13 Write Operation 4.14 Read Operation 4.15 Register Descriptions 4.15.1 RO_REG1 4.15.2 INTFLG_REG 4.15.3 VSET 4.15.4 CONV_CFG 4.15.5 INTFLG_MASK 5. Revision History 6. Package Outline Drawings
1. Overview 1.1 Block Diagram LX1 LX2 VIN VOUT ` GND GND Overcurrent Hysteretic PWM Controller SDA Undervoltage SCL Digital Core EN VREF Over-Temperature Figure 3. Block Diagram
FN8947 Rev.1.00 Page 3 of 20 Sep.14.20 Document Outline Features Applications Related Literature Contents 1. Overview 1.1 Block Diagram 1.2 Ordering Information 1.3 Pin Configurations 1.4 Pin Descriptions 2. Specifications 2.1 Absolute Maximum Ratings 2.2 Thermal Information 2.3 Recommended Operation Conditions 2.4 Analog Specifications 2.5 I2C Interface Timing Specifications 3. Typical Performance Curves 4. Functional Description 4.1 Enable Input 4.2 Soft Discharge 4.3 Start-Up 4.4 Overcurrent/Short-Circuit Protection 4.5 Thermal Shutdown 4.6 Buck-Boost Conversion Topology 4.7 PWM Operation 4.8 PFM Operation 4.9 Operation With VIN Close to VOUT 4.10 Forced Operating Modes 4.11 I2C Serial Interface 4.12 Protocol Conventions 4.13 Write Operation 4.14 Read Operation 4.15 Register Descriptions 4.15.1 RO_REG1 4.15.2 INTFLG_REG 4.15.3 VSET 4.15.4 CONV_CFG 4.15.5 INTFLG_MASK 5. Revision History 6. Package Outline Drawings