Datasheet MLX75026 (Melexis) - 8
| Fabricante | Melexis |
| Descripción | QVGA Time-of-Flight Sensor |
| Páginas / Página | 64 / 8 — MLX75026 QVGA Time-of-Flight Sensor. 3. Electrical Specifications. … |
| Formato / tamaño de archivo | PDF / 3.1 Mb |
| Idioma del documento | Inglés |
MLX75026 QVGA Time-of-Flight Sensor. 3. Electrical Specifications. Parameter. Symbol. Min. Max. Unit. Typ
Línea de modelo para esta hoja de datos
Versión de texto del documento
MLX75026 QVGA Time-of-Flight Sensor
PRELIMINARY DATASHEET
3. Electrical Specifications
3.1. Absolute Maximum Ratings
Parameter Symbol Min. Max. Unit
Supply voltage (analog) VDDA -0.3 3.3 V Supply voltage (MIX drivers) VDDMIX -0.3 1.8 V Supply voltage (digital) VDDD -0.3 1.8 V Supply voltage (interfaces) VDDIF -0.3 3.3 V Input voltage (digital IOs) VI -0.3 3.3 V Output voltage (digital IOs) VO -0.3 3.3 V Storage temperature -40 125 °C Table 4: Absolute Maximum Ratings Note : Absolute maximum ratings should not be exceeded at any time to avoid permanent hardware damage. 3.2. Typical Operating Conditions
Parameter Min. Typ. Max. Unit
VDDA Supply Voltage1 2.6 2.7 2.8 V VDDMIX Supply Voltage 1 1.1 1.2 1.3 V VDDD Supply Voltage 1 1.1 1.2 1.3 V VDDIF Supply Voltage 1 1.7 1.8 1.9 V LEDP, LEDN single ended high level2 VDDIF - 0.2 V LEDEN2 LEDP, LEDN single ended low level3 0.2 V LEDEN3 LEDP/LEDN differential common mode VDDIF / 2 VDDIF / 2 VDDIF / 2 mV (LVDS_EN = 1) - 0.1 + 0.1 LEDP/LEDN differential swing 100 150 220 mV (with R = 100W, LVDS_EN = 1) LEDP, LEDN termination resistor 100 Ohm Minimum TRIGGER pulse length 1 µs Minimum RESETB pulse length 1 µs TRIGGER RESETB Maximum input 0.2* V SLASEL low VDDIF LEDFB TRIGGER RESETB Minimum input 0.8* VDDIF V SLASEL high LEDFB Junction to Ambient Thermal Resistance 25 K/W Operating ambient temperature -40 105 °C @ -40°C Tj ±7 °C Temperature sensor @ 60°C Tj ±5 °C accuracy @ 125°C Tj ±6 °C Table 5: Typical Operating Conditions Note1 : It is recommended to use the typical supply voltages Note1 : It is recommended to use the typical supply voltages Note2 : current of -2mA, LVDS_EN = 0, typical load 15pF Note2 : current of -2mA, LVDS_EN = 0, typical load 15pF Note3 : current of 2mA, LVDS_EN = 0, typical load 15pF Note3 : current of 2mA, LVDS_EN = 0, typical load 15pF Preliminary Datasheet v0.5 Page 8 of 64 Document Outline Table of Contents Document Revision History Ordering Information 1. System Architecture 2. Sensor Block Diagram 3. Electrical Specifications 3.1. Absolute Maximum Ratings 3.2. Typical Operating Conditions 3.3. Video Interface 3.3.1. MIPI DC specification 3.3.2. MIPI AC specification 3.4. Power Consumption 3.5. Maximum Distance Frame Rate 3.6. Decoupling Recommendations 3.7. Power-up Sequence 3.8. Input Clock Requirements 3.9. I2C Specifications 4. Optical Characteristics 4.1. QVGA Pixel Array Configuration 4.2. Pixel & Image Array Characteristics 4.3. CRA (Chief Ray Angle) 4.4. MTF (Modulation Transfer Function) 4.5. Application Lens Design Recommendations 5. Communication Interface(s) 5.1. I2C (Inter-Integrated Circuit) 5.1.1. I2C Timing Sequence 5.1.2. Single I2C Read 5.1.3. Sequential I2C Read 5.1.4. Single I2C Write 5.1.5. Sequential I2C Write 5.1.6. I2C Slave Address 5.2. MIPI Alliance CSI-2 Description 5.2.1. Packet Structure 5.2.2. Data Format RAW12 5.2.2.1. Data Format in 4 Lane MIPI Configuration 5.2.2.2. Data Format in 2 Lane MIPI Configuration 6. Start-up Sequence 6.1. Initialization Process 6.2. Initialization Register Map 7. Register Settings 7.1. Video Output Configuration 7.2. Modes of Operation 7.3. Data Output Modes 7.4. HMAX & Frame Read-Out Time 7.4.1. PLLSSETUP 7.4.2. PRETIME 7.4.3. RANDNM0 7.5. PARAM_HOLD 7.6. USER_ID Register 7.7. Modulation Frequency 7.8. Frame Structure & Frame Rate 7.9. FRAME_STARTUP 7.10. FRAME_TIME 7.11. PHASE_COUNT 7.12. Px_PREHEAT, Px_PREMIX 7.13. Px_INTEGRATION 7.14. Px_PHASE_SHIFT 7.15. Px_PHASE_IDLE (or V-blanking) 7.16. Px_LEDEN 7.17. Px_DMIX0, Px_DMIX1 & Px_STATIC_LED 7.18. Analog Delay Setting 7.18.1. Coarse Delay 7.18.2. Fine Delay 7.18.3. Super Fine 7.19. Pixel Binning 7.20. Region of Interest (ROI) 7.21. Flip & Mirror 7.22. Temperature Sensor 7.23. Pixel & Phase Statistics 7.24. PN9 Test Pattern 7.25. Duty Cycle Adjustment 7.26. Illumination Signal (subLVDS or CMOS) 8. MetaData Description 8.1. Embedded Data Format in 4 Lane MIPI Configuration 8.2. Embedded Data Format in 2 Lane MIPI Configuration 9. Distance & Amplitude Calculation 10. Package Outline 10.1. Pinout & Equivalent I/O Circuitry 10.2. Mechanical Dimensions 10.3. PCB Landing Pattern & Layout Recommendations 10.4. Package Marking 10.5. Cover Tape Removal Disclaimer
PRELIMINARY DATASHEET
3. Electrical Specifications
3.1. Absolute Maximum Ratings
Parameter Symbol Min. Max. Unit
Supply voltage (analog) VDDA -0.3 3.3 V Supply voltage (MIX drivers) VDDMIX -0.3 1.8 V Supply voltage (digital) VDDD -0.3 1.8 V Supply voltage (interfaces) VDDIF -0.3 3.3 V Input voltage (digital IOs) VI -0.3 3.3 V Output voltage (digital IOs) VO -0.3 3.3 V Storage temperature -40 125 °C Table 4: Absolute Maximum Ratings Note : Absolute maximum ratings should not be exceeded at any time to avoid permanent hardware damage. 3.2. Typical Operating Conditions
Parameter Min. Typ. Max. Unit
VDDA Supply Voltage1 2.6 2.7 2.8 V VDDMIX Supply Voltage 1 1.1 1.2 1.3 V VDDD Supply Voltage 1 1.1 1.2 1.3 V VDDIF Supply Voltage 1 1.7 1.8 1.9 V LEDP, LEDN single ended high level2 VDDIF - 0.2 V LEDEN2 LEDP, LEDN single ended low level3 0.2 V LEDEN3 LEDP/LEDN differential common mode VDDIF / 2 VDDIF / 2 VDDIF / 2 mV (LVDS_EN = 1) - 0.1 + 0.1 LEDP/LEDN differential swing 100 150 220 mV (with R = 100W, LVDS_EN = 1) LEDP, LEDN termination resistor 100 Ohm Minimum TRIGGER pulse length 1 µs Minimum RESETB pulse length 1 µs TRIGGER RESETB Maximum input 0.2* V SLASEL low VDDIF LEDFB TRIGGER RESETB Minimum input 0.8* VDDIF V SLASEL high LEDFB Junction to Ambient Thermal Resistance 25 K/W Operating ambient temperature -40 105 °C @ -40°C Tj ±7 °C Temperature sensor @ 60°C Tj ±5 °C accuracy @ 125°C Tj ±6 °C Table 5: Typical Operating Conditions Note1 : It is recommended to use the typical supply voltages Note1 : It is recommended to use the typical supply voltages Note2 : current of -2mA, LVDS_EN = 0, typical load 15pF Note2 : current of -2mA, LVDS_EN = 0, typical load 15pF Note3 : current of 2mA, LVDS_EN = 0, typical load 15pF Note3 : current of 2mA, LVDS_EN = 0, typical load 15pF Preliminary Datasheet v0.5 Page 8 of 64 Document Outline Table of Contents Document Revision History Ordering Information 1. System Architecture 2. Sensor Block Diagram 3. Electrical Specifications 3.1. Absolute Maximum Ratings 3.2. Typical Operating Conditions 3.3. Video Interface 3.3.1. MIPI DC specification 3.3.2. MIPI AC specification 3.4. Power Consumption 3.5. Maximum Distance Frame Rate 3.6. Decoupling Recommendations 3.7. Power-up Sequence 3.8. Input Clock Requirements 3.9. I2C Specifications 4. Optical Characteristics 4.1. QVGA Pixel Array Configuration 4.2. Pixel & Image Array Characteristics 4.3. CRA (Chief Ray Angle) 4.4. MTF (Modulation Transfer Function) 4.5. Application Lens Design Recommendations 5. Communication Interface(s) 5.1. I2C (Inter-Integrated Circuit) 5.1.1. I2C Timing Sequence 5.1.2. Single I2C Read 5.1.3. Sequential I2C Read 5.1.4. Single I2C Write 5.1.5. Sequential I2C Write 5.1.6. I2C Slave Address 5.2. MIPI Alliance CSI-2 Description 5.2.1. Packet Structure 5.2.2. Data Format RAW12 5.2.2.1. Data Format in 4 Lane MIPI Configuration 5.2.2.2. Data Format in 2 Lane MIPI Configuration 6. Start-up Sequence 6.1. Initialization Process 6.2. Initialization Register Map 7. Register Settings 7.1. Video Output Configuration 7.2. Modes of Operation 7.3. Data Output Modes 7.4. HMAX & Frame Read-Out Time 7.4.1. PLLSSETUP 7.4.2. PRETIME 7.4.3. RANDNM0 7.5. PARAM_HOLD 7.6. USER_ID Register 7.7. Modulation Frequency 7.8. Frame Structure & Frame Rate 7.9. FRAME_STARTUP 7.10. FRAME_TIME 7.11. PHASE_COUNT 7.12. Px_PREHEAT, Px_PREMIX 7.13. Px_INTEGRATION 7.14. Px_PHASE_SHIFT 7.15. Px_PHASE_IDLE (or V-blanking) 7.16. Px_LEDEN 7.17. Px_DMIX0, Px_DMIX1 & Px_STATIC_LED 7.18. Analog Delay Setting 7.18.1. Coarse Delay 7.18.2. Fine Delay 7.18.3. Super Fine 7.19. Pixel Binning 7.20. Region of Interest (ROI) 7.21. Flip & Mirror 7.22. Temperature Sensor 7.23. Pixel & Phase Statistics 7.24. PN9 Test Pattern 7.25. Duty Cycle Adjustment 7.26. Illumination Signal (subLVDS or CMOS) 8. MetaData Description 8.1. Embedded Data Format in 4 Lane MIPI Configuration 8.2. Embedded Data Format in 2 Lane MIPI Configuration 9. Distance & Amplitude Calculation 10. Package Outline 10.1. Pinout & Equivalent I/O Circuitry 10.2. Mechanical Dimensions 10.3. PCB Landing Pattern & Layout Recommendations 10.4. Package Marking 10.5. Cover Tape Removal Disclaimer