Datasheet K6R1016V1D (Samsung) - 5

for AT&T K6R1016V1D CMOS SRAM DC AND OPERATING CHARACTERISTICS*
(TA=0 to 70°C, Vcc=3.3±0.3V, unless otherwise specified)
Parameter Symbol Test Conditions Min Max Unit
Input Leakage Current ILI VIN=VSS to VCC -2 2 µA Output Leakage Current ILO CS=VIH or OE=VIH or WE=VIL -2 2 µA VOUT=VSS to VCC Operating Current ICC Min. Cycle, 100% Duty Com. 8ns - 80 mA CS=VIL, VIN=VIH or VIL, IOUT=0mA 10ns - 65 Ind. 8ns - 90 10ns - 75 Standby Current ISB Min. Cycle, CS=VIH - 20 mA ISB1 f=0MHz, CS≥VCC-0.2V, - 5 VIN≥VCC-0.2V or VIN≤0.2V Output Low Voltage Level VOL IOL=8mA - 0.4 V Output High Voltage Level VOH IOH=-4mA 2.4 - V * The above parameters are also guaranteed at industrial temperature range.
CAPACITANCE*
(TA=25°C, f=1.0MHz)
Item Symbol Test Conditions MIN Max Unit
Input/Output Capacitance CI/O VI/O=0V - 8 pF Input Capacitance CIN VIN=0V - 6 pF * Capacitance is sampled and not 100% tested.
AC CHARACTERISTICS
(TA=0 to 70°C, Vcc=3.3V+0.3V/-0.15V, unless otherwise noted.)
TEST CONDITIONS* Parameter Value
Input Pulse Levels 0V to 3V Input Rise and Fall Times 3ns Input and Output timing Reference Levels 1.5V Output Loads See below * The above test conditions are also applied at industrial temperature range. Output Loads(A) Output Loads(B) for tHZ, tLZ, tWHZ, tOW, tOLZ & tOHZ +3.3V DOUT RL = 50Ω VL = 1.5V 319Ω DOUT 30pF* ZO = 50Ω 353Ω 5pF* * Capacitive Load consists of all components of the * Including Scope and Jig Capacitance test environment.
Revision 3.0
- 5 -
June 2002