Datasheet M29W040B (STMicroelectronics) - 7

FabricanteSTMicroelectronics
Descripción4 Mbit (512Kb x8, Uniform Block) Low Voltage Single Supply Flash Memory
Páginas / Página20 / 7 — M29W040B. Block Erase Command. Erase Suspend Command. Erase Resume Command
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M29W040B. Block Erase Command. Erase Suspend Command. Erase Resume Command

M29W040B Block Erase Command Erase Suspend Command Erase Resume Command

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M29W040B Block Erase Command.
The Block Erase com- ter. A Read/Reset command must be issued to re- mand can be used to erase a list of one or more set the error condition and return to Read mode. blocks. Six Bus Write operations are required to The Block Erase Command sets all of the bits in select the first block in the list. Each additional the unprotected selected blocks to ‘1’. All previous block in the list can be selected by repeating the data in the selected blocks is lost. sixth Bus Write operation using the address of the
Erase Suspend Command.
The Erase Suspend additional block. The Block Erase operation starts Command may be used to temporarily suspend a the Program/Erase Controller about 50µs after the Block Erase operation and return the memory to last Bus Write operation. Once the Program/Erase Read mode. The command requires one Bus Controller starts it is not possible to select any Write operation. more blocks. Each additional block must therefore be selected within 50µs of the last block. The 50µs The Program/Erase Controller will suspend within timer restarts when an additional block is selected. 15µs of the Erase Suspend Command being is- The Status Register can be read after the sixth sued. Once the Program/Erase Controller has Bus Write operation. See the Status Register for stopped the memory will be set to Read mode and details on how to identify if the Program/Erase the Erase will be suspended. If the Erase Suspend Controller has started the Block Erase operation. command is issued during the period when the memory is waiting for an additional block (before If any selected blocks are protected then these are the Program/Erase Controller starts) then the ignored and all the other selected blocks are Erase is suspended immediately and will start im- erased. If all of the selected blocks are protected mediately when the Erase Resume Command is the Block Erase operation appears to start but will issued. It will not be possible to select any further terminate within about 100µs, leaving the data un- blocks for erasure after the Erase Resume. changed. No error condition is given when protect- ed blocks are ignored. During Erase Suspend it is possible to Read and Program cells in blocks that are not being erased; During the Block Erase operation the memory will both Read and Program operations behave as ignore all commands except the Erase Suspend normal on these blocks. Reading from blocks that and Read/Reset commands. Typical block erase are being erased will output the Status Register. It times are given in Table 6. All Bus Read opera- is also possible to enter the Auto Select mode: the tions during the Block Erase operation will output memory will behave as in the Auto Select mode on the Status Register on the Data Inputs/Outputs. all blocks until a Read/Reset command returns the See the section on the Status Register for more memory to Erase Suspend mode. details.
Erase Resume Command.
The Erase Resume After the Block Erase operation has completed the command must be used to restart the Program/ memory will return to the Read Mode, unless an Erase Controller from Erase Suspend. An erase error has occurred. When an error occurs the can be suspended and resumed more than once. memory will continue to output the Status Regis-
Table 6. Program, Erase Times and Program, Erase Endurance Cycles
(TA = 0 to 70°C or –40 to 85°C)
Typical after Parameter Min Typ (1) 100k W/E Cycles (1) Max Unit
Chip Erase (All bits in the memory set to ‘0’) 2.5 2.5 sec Chip Erase 6 6 35 sec Block Erase (64 Kbytes) 0.8 0.8 6 sec Program 10 10 200 µs Chip Program 5.5 5.5 30 sec Program/Erase Cycles (per Block) 100,000 cycles Note: 1. TA = 25°C, VCC = 3.3V. 7/20 Document Outline Table 1. Signal Names Table 2. Absolute Maximum Ratings (1) Table 3. Uniform Block Addresses, M29W040B Table 4. Bus Operations Table 5. Commands Read/Reset. Auto Select. Program, Unlock Bypass Program, Chip Erase, Block Erase. Unlock Bypass. Unlock Bypass Reset. Erase Suspend. Erase Resume. Table 6. Program, Erase Times and Program, Erase Endurance Cycles (TA = 0 to 70˚C or –40 to 85˚C) Table 7. Status Register Bits Table 8. AC Measurement Conditions Table 9. Capacitance (TA = 25 ˚C, f = 1 MHz) Table 10. DC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 11. Read AC Characteristics (TA = 0 to 70˚C or –40 to 85˚C) Table 12. Write AC Characteristics, Write Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 13. Write AC Characteristics, Chip Enable Controlled (TA = 0 to 70˚C or –40 to 85˚C) Table 14. Ordering Information Scheme Table 15. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Mechanical Data Table 16. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Mechanical Data Table 17. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Mechanical Data Table 18. Revision History SUMMARY DESCRIPTION SIGNAL DESCRIPTIONS Address Inputs (A0-A18). Data Inputs/Outputs (DQ0-DQ7). Chip Enable (E). Output Enable (G). Write Enable (W). VCC Supply Voltage. VSS Ground. BUS OPERATIONS Bus Read. Bus Write. Output Disable. Standby. Automatic Standby. Special Bus Operations Electronic Signature. Block Protection and Blocks Unprotection. COMMAND INTERFACE Read/Reset Command. Auto Select Command. Program Command. Unlock Bypass Command. Unlock Bypass Program Command. Unlock Bypass Reset Command. Chip Erase Command. Block Erase Command. Erase Suspend Command. Erase Resume Command. STATUS REGISTER Data Polling Bit (DQ7). Toggle Bit (DQ6). Error Bit (DQ5). Erase Timer Bit (DQ3). Alternative Toggle Bit (DQ2). Figure 1. Logic Diagram Figure 2. PLCC Connections Figure 3. TSOP Connections Figure 4. Data Polling Flowchart Figure 5. Data Toggle Flowchart Figure 6. AC Testing Input Output Waveform Figure 7. AC Testing Load Circuit Figure 8. Read Mode AC Waveforms Figure 9. Write AC Waveforms, Write Enable Controlled Figure 10. Write AC Waveforms, Chip Enable Controlled Figure 11. PLCC32 – 32 lead Plastic Leaded Chip Carrier, Package Outline Figure 12. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 20mm, Package Outline Figure 13. TSOP32 – 32 lead Plastic Thin Small Outline, 8 x 14mm, Package Outline