Datasheet AD8557 (Analog Devices) - 10

AD8557 Data Sheet 140 120 CMRR GAIN +28 000 100 CMRR GAIN +448 8 × 1 CHANNEL 1 2 16.6mV p-p CMRR GAIN +1300 = B) IN d 80 A G 1 RR ( 60 ISE, CM O E N 40 G A T L O 20 V
5
0
02
–50 –25 0 25 50 75 100 125 150 175
13- 22 0
CH1 10.0mV M 1.00s A CH1 –2.80mV
60 3- 0
TEMPERATURE (°C)
01 06 Figure 22. CMRR vs. Temperature at Different Gains, VSY = 2.7 V Figure 25. Low Frequency Input Voltage Noise 0.1 Hz to 10 Hz, VSY = 2.7 V
REF 502µV MARKER 20 000.0Hz 5dB/DIV RANGE 12.5mV 1.89µV/√Hz 70 VSY = 5V 60 HIGH GAIN +1300 62.28dB 50 40 ) B d 30 ( IN LOW GAIN +28 28.9dB 20 GA 10 0 –10 –200.1 1 10 100 1k 10k
26 0 3- 23 01
START .0 Hz STOP 1 000 000.0Hz FREQUENCY (kHz)
-0 06 13
RBW 100Hz VBW 300Hz ST 900s
60 0 Figure 23. Input Voltage Noise Density vs. Frequency (0 Hz to 1000 kHz) Figure 26. Closed-Loop Gain vs. Frequency Measured at Output Pin, VSY = 5 V
70 VSY = 2.7V 60 HIGH GAIN +1300 62.28dB 1000 50 8 × CHANNEL 1 2 15.2mV p-p 40 = IN ) A B d 30 , G 1 ( E IN LOW GAIN +28 28.9dB IS 20 GA NO E 10 AG T L 0 O V –10
4 02
–20
13-
CH1 10.0mV M 1.00s A CH1 –2.80mV
60
0.1 1 10 100 1k 10k
27 0 0 3-
FREQUENCY (kHz)
01 06 Figure 24. Low Frequency Input Voltage Noise, 0.1 Hz to 10 Hz, VSY = 5 V Figure 27. Closed-Loop Gain vs. Frequency Measured at Output Pin, VSY = 2.7 V Rev. D | Page 10 of 24 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION GAIN VALUES OPEN WIRE FAULT DETECTION SHORTED WIRE FAULT DETECTION FLOATING VPOS, VNEG, OR VCLAMP FAULT DETECTION DEVICE PROGRAMMING Digital Interface Initial State Simulation Mode Programming Mode Read Mode Sense Current Programming Procedure Determining Optimal Gain and Offset Codes OUTLINE DIMENSIONS ORDERING GUIDE AUTOMOTIVE PRODUCTS