AD8426Dynamic Performance Specifications +VS = +15 V, −VS = −15 V, VREF = 0 V, TA = 25°C, G = 1, RL = 10 kΩ, specifications referred to input, unless otherwise noted. Table 3. Single-Ended Output Configuration (Both Amplifiers)Test Conditions/A GradeB GradeParameterCommentsMinTypMaxMinTypMaxUnit DYNAMIC RESPONSE Small Signal −3 dB Bandwidth G = 1 1000 1000 kHz G = 10 160 160 kHz G = 100 20 20 kHz G = 1000 2 2 kHz Settling Time 0.01% 10 V step G = 1 25 25 μs G = 10 15 15 μs G = 100 40 40 μs G = 1000 750 750 μs Slew Rate G = 1 0.4 0.4 V/μs G = 5 to 100 0.6 0.6 V/μs Table 4. Differential Output ConfigurationTest Conditions/A GradeB GradeParameterCommentsMinTypMaxMinTypMaxUnit DYNAMIC RESPONSE Small Signal −3 dB Bandwidth G = 1 850 850 kHz G = 10 300 300 kHz G = 100 30 30 kHz G = 1000 2 2 kHz Settling Time 0.01% 10 V step G = 1 25 25 μs G = 10 15 15 μs G = 100 80 80 μs G = 1000 300 300 μs Slew Rate G = 1 0.4 0.4 V/μs G = 5 to 100 0.6 0.6 V/μs Rev. 0 | Page 5 of 28 Document Outline FEATURES APPLICATIONS CONNECTION DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS DUAL-SUPPLY OPERATION Dynamic Performance Specifications SINGLE-SUPPLY OPERATION Dynamic Performance Specifications ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATION AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ARCHITECTURE GAIN SELECTION REFERENCE TERMINAL INPUT VOLTAGE RANGE LAYOUT Package Considerations Hidden Paddle Package Common-Mode Rejection Ratio over Frequency Power Supplies References INPUT BIAS CURRENT RETURN PATH INPUT PROTECTION RADIO FREQUENCY INTERFERENCE (RFI) APPLICATIONS INFORMATION PRECISION STRAIN GAGE DIFFERENTIAL DRIVE Differential Output Using Both AD8426 Amplifiers 2-Channel Differential Output Using a Dual Op Amp Tips for Best Differential Output Performance DRIVING A CABLE DRIVING AN ADC OUTLINE DIMENSIONS ORDERING GUIDE