Datasheet AD632 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Internally Trimmed Precision IC Multiplier |
| Páginas / Página | 12 / 9 — Data Sheet. AD632. OPERATION AS A DIVIDER. X INPUT. +VS. +15V. … |
| Revisión | D |
| Formato / tamaño de archivo | PDF / 301 Kb |
| Idioma del documento | Inglés |
Data Sheet. AD632. OPERATION AS A DIVIDER. X INPUT. +VS. +15V. (DENOMINATOR). +10V FS. OUTPUT, ±12V PK. +12V PK. 10 (Z. 2 – Z1). + Y. (X1 – X2)
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Data Sheet AD632 OPERATION AS A DIVIDER
Figure 9 shows the connection required for division. Unlike
+
earlier products, the AD632 provides differential operation on
X INPUT X1 +VS +15V (DENOMINATOR)
both the numerator and the denominator, allowing the ratio of
+10V FS OUTPUT, ±12V PK +12V PK X2 10 (Z – 2 – Z1) = + Y
two floating variables to be generated. Further flexibility results
1 (X1 – X2) +15V +V
from access to a high impedance summing input to Y
S OUT
1. As with
2kΩ
all dividers based on the use of a multiplier in a feedback loop,
TO VOS Z1 Z INPUT 200kΩ
the bandwidth is proportional to the denominator magnitude,
(NUMERATOR) –15V –V ±10V FS, ±12V PK OPTIONAL S Z2
as shown in Figure 6.
SUMMING INPUT ±10V PK Y1
The accuracy of the AD632 B-model is sufficient to maintain a 1% error over a 10 V to 1 V denominator range.
Y2 –VS –15V
010 09040- Figure 9. Basic Divider Connection Rev. D | Page 9 of 12 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings Thermal Resistance Pin Configurations and Function Descriptions Typical Performance Characteristics Operation As a Multiplier Operation As a Divider Outline Dimensions Ordering Guide
Data Sheet AD632 OPERATION AS A DIVIDER
Figure 9 shows the connection required for division. Unlike
+
earlier products, the AD632 provides differential operation on
X INPUT X1 +VS +15V (DENOMINATOR)
both the numerator and the denominator, allowing the ratio of
+10V FS OUTPUT, ±12V PK +12V PK X2 10 (Z – 2 – Z1) = + Y
two floating variables to be generated. Further flexibility results
1 (X1 – X2) +15V +V
from access to a high impedance summing input to Y
S OUT
1. As with
2kΩ
all dividers based on the use of a multiplier in a feedback loop,
TO VOS Z1 Z INPUT 200kΩ
the bandwidth is proportional to the denominator magnitude,
(NUMERATOR) –15V –V ±10V FS, ±12V PK OPTIONAL S Z2
as shown in Figure 6.
SUMMING INPUT ±10V PK Y1
The accuracy of the AD632 B-model is sufficient to maintain a 1% error over a 10 V to 1 V denominator range.
Y2 –VS –15V
010 09040- Figure 9. Basic Divider Connection Rev. D | Page 9 of 12 Document Outline Features Applications Functional Block Diagram General Description Product Highlights Revision History Specifications Absolute Maximum Ratings Thermal Resistance Pin Configurations and Function Descriptions Typical Performance Characteristics Operation As a Multiplier Operation As a Divider Outline Dimensions Ordering Guide