Datasheet AD539 (Analog Devices) - 6

AD539 VX 1 16 W1 HF COMP 2 15 Z1 VY1 3 14 CHAN1 OUTPUT AD539 +VS 4 TOP VIEW 13 BASE COMMON –V (Not to Scale) S 5 12 BASE COMMON VY2 6 11 CHAN2 PUTPUT INPUT COMMON 7 10 Z2
-003
OUTPUT COMMON 8 9 W2
9679 0 Figure 3. 16-Lead PDIP and SBDIP Pin Configurations (N-16, D-16)
Table 3. 16-Lead PDIP and SBDIP Pin Function Descriptions Pin No. Mnemonic Description
1 VX Control Channel Input. 2 HF COMP High Frequency Compensation. 3 VY1 Channel 1 Input. 4 +VS Positive Supply Rail. 5 –VS Negative Supply Rail. 6 VY2 Channel 2 Input. 7 INPUT COMMON Internal Common Connection for the Input Amplifier Circuitry. 8 OUTPUT COMMON Internal Common Connection for The Output Amplifier Circuitry. 9 W2 6 kΩ Feedback Resistor for Channel 2. 10 Z2 6 kΩ Feedback Resistor for Channel 2. 11 CHAN2 OUTPUT Channel 2 Product of VX and VY2. 12 BASE COMMON Increases Negative Output Compliance. 13 BASE COMMON Increases Negative Output Compliance. 14 CHAN1 OUTPUT Channel 1 Product of VX and VY1. 15 Z1 6 kΩ Feedback Resistor for Channel 1. 16 W1 6 kΩ Feedback Resistor for Channel 1. Rev. B | Page 6 of 20 Document Outline FEATURES APPLICATIONS FUNCTIONAL BLOCK DIAGRAM GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION CIRCUIT DESCRIPTION GENERAL RECOMMENDATIONS TRANSFER FUNCTION DUAL SIGNAL CHANNELS COMMON CONTROL CHANNEL FLEXIBLE SCALING APPLICATIONS INFORMATION BASIC MULTIPLIER CONNECTIONS Signal Channel AC and Transient Response Minimal Wideband Configurations Differential Configurations A 50 MHZ VOLTAGE-CONTROLLED AMPLIFIER BASIC DIVIDER CONNECTIONS Standard Scaling OUTLINE DIMENSIONS ORDERING GUIDE