Datasheet ADP1710, ADP1711 (Analog Devices) - 5
| Fabricante | Analog Devices |
| Descripción | 150 mA, Low Dropout, CMOS Linear Regulator |
| Páginas / Página | 16 / 5 — ADP1710/ADP1711. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. IN 1. OUT. … |
| Formato / tamaño de archivo | PDF / 876 Kb |
| Idioma del documento | Inglés |
ADP1710/ADP1711. PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS. IN 1. OUT. ADP1710. ADP1711. FIXED. ADJUSTABLE. GND 2. TOP VIEW
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ADP1710/ADP1711 PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS IN 1 5 OUT ADP1710 IN 1 5 OUT IN 1 5 OUT ADP1710 ADP1711 FIXED ADJUSTABLE GND 2 GND 2 GND 2 TOP VIEW TOP VIEW TOP VIEW (Not to Scale)
6
(Not to Scale)
5
EN 3 4 NC (Not to Scale)
00 00 4
EN 3 4 ADJ EN 3 4 BYP
10- 10- 00 0- 063 063
NC = NO CONNECT
631 0 Figure 4. 5-Lead TSOT (UJ-Suffix) Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix)
Table 4. Pin Function Descriptions ADP1710 ADP1710 Fixed Adjustable ADP1711 Pin No. Pin No. Pin No. Mnemonic Description
1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor. 2 2 2 GND Ground. 3 3 3 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 4 NC No Connect. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 BYP Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND to reduce the internal reference noise for low noise applications. 5 5 5 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor. Rev. 0 | Page 5 of 16 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE OUTPUT VOLTAGE (ADP1710 ADJUSTABLE) BYPASS CAPACITOR (ADP1711) ENABLE FEATURE UNDERVOLTAGE LOCKOUT (UVLO) APPLICATION INFORMATION CAPACITOR SELECTION CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE
6
(Not to Scale)
5
EN 3 4 NC (Not to Scale)
00 00 4
EN 3 4 ADJ EN 3 4 BYP
10- 10- 00 0- 063 063
NC = NO CONNECT
631 0 Figure 4. 5-Lead TSOT (UJ-Suffix) Figure 5. 5-Lead TSOT (UJ-Suffix) Figure 6. 5-Lead TSOT (UJ-Suffix)
Table 4. Pin Function Descriptions ADP1710 ADP1710 Fixed Adjustable ADP1711 Pin No. Pin No. Pin No. Mnemonic Description
1 1 1 IN Regulator Input Supply. Bypass IN to GND with a 1 μF or greater capacitor. 2 2 2 GND Ground. 3 3 3 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 4 NC No Connect. 4 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 4 BYP Connect a 1 nF or greater capacitor (10 nF is recommended) between BYP and GND to reduce the internal reference noise for low noise applications. 5 5 5 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 μF or greater capacitor. Rev. 0 | Page 5 of 16 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION ADJUSTABLE OUTPUT VOLTAGE (ADP1710 ADJUSTABLE) BYPASS CAPACITOR (ADP1711) ENABLE FEATURE UNDERVOLTAGE LOCKOUT (UVLO) APPLICATION INFORMATION CAPACITOR SELECTION CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PRINTED CIRCUIT BOARD LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE