Datasheet ADP1720-EP (Analog Devices) - 6

ADP1720-EP Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS ADP1720-EP ADP1720-EP FIXED ADJUSTABLE GND 1 8 GND ADJ 1 8 GND IN 2 7 GND IN 2 7 GND TOP VIEW TOP VIEW (Not to Scale) OUT 3 (Not to Scale) 6 GND OUT 3 6 GND
003 004
EN 4 5 GND EN 4 5 GND
09723- 09723- Figure 3. 8-Lead MSOP Pin Configuration—Fixed Output Voltage Figure 4. 8-Lead MSOP Pin Configuration—Adjustable Output Voltage
Table 4. Pin Function Descriptions Pin No. Fixed Adjustable Mnemonic Description
1 N/A GND This pin is internally connected to ground. N/A 1 ADJ Adjust. A resistor divider from OUT to ADJ sets the output voltage. 2 2 IN Regulator Input Supply. Bypass IN to GND with a 1 µF or greater capacitor. 3 3 OUT Regulated Output Voltage. Bypass OUT to GND with a 1 µF or greater capacitor. 4 4 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to IN. 5 5 GND Ground. 6 6 GND Ground. 7 7 GND Ground. 8 8 GND Ground. Rev. A | Page 6 of 12 Document Outline Features Enhanced Product Features Applications Typical Application Circuits General Description Revision History Specifications Absolute Maximum Ratings Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Applications Information Thermal Considerations Outline Dimensions Ordering Guide