Datasheet ADP121 (Analog Devices) - 5

Data Sheet ADP121 ABSOLUTE MAXIMUM RATINGS
Junction-to-ambient thermal resistance, θ
Table 3.
JA, is based on modeling and calculation using a four-layer board. The
Parameter Rating
junction-to-ambient thermal resistance is highly dependent VIN to GND −0.3 V to +6.5 V on the application and board layout. In applications where high VOUT to GND −0.3 V to VIN maximum power dissipation exists, close attention to thermal EN to GND −0.3 V to +6.5 V board design is required. The value of θJA may vary, depending Storage Temperature Range −65°C to +150°C on PCB material, layout, and environmental conditions. The Operating Junction Temperature Range −40°C to +125°C specified values of θJA are based on a 4-layer, 4” × 3”, circuit Soldering Conditions JEDEC J-STD-020 board. Refer to JESD 51-7 and JESD 51-9 for detailed information on the board construction. For additional Stresses above those listed under Absolute Maximum Ratings information, see AN-617 Application Note, MicroCSPTM may cause permanent damage to the device. This is a stress Wafer Level Chip Scale Package. rating only; functional operation of the device at these or any other conditions above those indicated in the operational ΨJB is the junction-to-board thermal characterization parameter section of this specification is not implied. Exposure to absolute measured in °C/W. ΨJB is based on modeling and calculation maximum rating conditions for extended periods may affect using a four-layer board. The JESD51-12 Guidelines for Reporting device reliability. and Using Package Thermal Information states that thermal characterization parameters are not the same as thermal
THERMAL DATA
resistances. ΨJB measures the component power flowing Absolute maximum ratings apply individually only, not in through multiple thermal paths rather than a single path as in combination. The ADP121 can be damaged when the junction thermal resistance, θJB. Therefore, ΨJB thermal paths include temperature limits are exceeded. Monitoring the ambient convection from the top of the package as wel as radiation temperature does not guarantee that the junction temperature from the package, factors that make ΨJB more useful in real- (T world applications. Maximum T J) is within the specified temperature limits. In applications J is calculated from the board with high power dissipation and poor thermal resistance, the temperature (TB) and PD using the following formula: maximum ambient temperature may have to be derated. TJ = TB + (PD × ΨJB) In applications with moderate power dissipation and low PCB Refer to JESD51-8 and JESD51-12 for more detailed thermal resistance, the maximum ambient temperature can information about ΨJB. exceed the maximum limit as long as the junction temperature is within specification limits. TJ of the device is dependent on
THERMAL RESISTANCE
the ambient temperature (TA), the power dissipation of the device (P θJA and ΨJB are specified for the worst-case conditions, that is, a D), and the junction-to-ambient thermal resistance of the package (θ device soldered in a circuit board for surface-mount packages. JA). TJ is calculated from TA and PD using the following formula:
Table 4. Thermal Resistance
T
Package Type θ Ψ Unit
J = TA + (PD × θJA)
JA JB
5-Lead TSOT 170 43 °C/W 4-Ball 0.4 mm Pitch WLCSP 260 58 °C/W
ESD CAUTION
Rev. G | Page 5 of 20 Document Outline Features Applications Typical Application Circuits General Description Revision History Specifications Recommended Specifications: Input and Output Capacitors Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Undervoltage Lockout Enable Feature Current Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Outline Dimensions Ordering Guide