Datasheet ADP1740, ADP1741 (Analog Devices) - 6

ADP1740/ADP1741 Data Sheet PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS T T T T U U N N VIN VIN VOU VOU VI VI VO VO 6 5 4 3 6 5 4 3 1 1 1 1 1 1 1 1 VIN 1 12 VOUT VIN 1 12 VOUT VIN 2 11 VOUT ADP1740 VIN 2 11 VOUT ADP1741 VIN 3 TOP VIEW 10 VOUT VIN 3 TOP VIEW 10 VOUT EN 4 9 SENSE EN 4 9 ADJ 5 6 7 8 5 6 7 8 D D PG SS NC PG SS NC GN GN NOTES NOTES 1. NC = NO CONNECT. 1. NC = NO CONNECT. 2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES 2. THE EXPOSED PAD ON THE BOTTOM OF THE LFCSP ENHANCES THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND
4 003
THERMAL PERFORMANCE AND IS ELECTRICALLY CONNECTED TO GND
00
INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD
1-
INSIDE THE PACKAGE. IT IS RECOMMENDED THAT THE EXPOSED PAD
81-
BE CONNECTED TO THE GROUND PLANE ON THE BOARD. BE CONNECTED TO THE GROUND PLANE ON THE BOARD.
0708 070 Figure 3. ADP1740 Pin Configuration Figure 4. ADP1741 Pin Configuration
Table 5. Pin Function Descriptions Pin No. ADP1740 ADP17 41 M nemonic Description
1, 2, 3, 15, 16 1, 2, 3, 15, 16 VIN Regulator Input Supply. Bypass VIN to GND with a 4.7 μF or greater capacitor. Note that all five VIN pins must be connected to the source supply. 4 4 EN Enable Input. Drive EN high to turn on the regulator; drive it low to turn off the regulator. For automatic startup, connect EN to VIN. 5 5 PG Power-Good Output. This open-drain output requires an external pull-up resistor to VIN. If the part is in shutdown mode, current-limit mode, or thermal shutdown, or if it falls below 90% of the nominal output voltage, the PG pin immediately transitions low. 6 6 GND Ground. 7 7 SS Soft Start Pin. A capacitor connected to this pin determines the soft start time. 8 8 NC Not Connected. No internal connection. 9 SENSE Sense Input. This pin measures the actual output voltage at the load and feeds it to the error amplifier. Connect the SENSE pin as close to the load as possible to minimize the effect of IR drop between the regulator output and the load. 9 ADJ Adjust Pin. A resistor divider from VOUT to ADJ sets the output voltage. 10, 11, 12, 10, 11, 12, VOUT Regulated Output Voltage. Bypass VOUT to GND with a 4.7 μF or greater capacitor. Note that 13, 14 13, 14 all five VOUT pins must be connected to the load. EP EP Exposed The exposed pad on the bottom of the LFCSP enhances thermal performance and is pad electrically connected to GND inside the package. It is recommended that the exposed pad be connected to the ground plane on the board. Rev. H | Page 6 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION SOFT START FUNCTION ADJUSTABLE OUTPUT VOLTAGE (ADP1741) ENABLE FEATURE POWER-GOOD FEATURE REVERSE CURRENT PROTECTION FEATURE APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT CURRENT-LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE