Datasheet ADP1754, ADP1755 (Analog Devices) - 5

Data Sheet ADP1754/ADP1755 ABSOLUTE MAXIMUM RATINGS Table 3.
Junction-to-ambient thermal resistance (θJA) of the package is
Parameter Rating
based on modeling and calculation using a 4-layer board. The junction-to-ambient thermal resistance is highly dependent VIN to GND −0.3 V to +4.0 V on the application and board layout. In applications where high VOUT to GND −0.3 V to VIN maximum power dissipation exists, close attention to thermal EN to GND −0.3 V to VIN board design is required. The value of θ SS to GND −0.3 V to VIN JA may vary, depending on PCB material, layout, and environmental conditions. The PG to GND −0.3 V to +4.0 V specified values of θ SENSE/ADJ to GND −0.3 V to VIN JA are based on a 4-layer, 4 in × 3 in circuit board. Refer to JEDEC JESD51-7 for detailed information about Storage Temperature Range −65°C to +150°C board construction. For more information, see the AN-772 Junction Temperature Range −40°C to +125°C Application Note, A Design and Manufacturing Guide for the Junction Temperature 150°C Lead Frame Chip Scale Package (LFCSP). Soldering Conditions JEDEC J-STD-020 Ψ Stresses above those listed under Absolute Maximum Ratings JB is the junction-to-board thermal characterization parameter with units of °C/W. Ψ may cause permanent damage to the device. This is a stress JB of the package is based on modeling and calculation using a 4-layer board. The JESD51-12 document, rating only; functional operation of the device at these or any Guidelines for Reporting and Using Electronic Package Thermal other conditions above those indicated in the operational Information, states that thermal characterization parameters are section of this specification is not implied. Exposure to absolute not the same as thermal resistances. Ψ maximum rating conditions for extended periods may affect JB measures the component device reliability. power flowing through multiple thermal paths rather than through a single path as in thermal resistance, θJB. Therefore, ΨJB thermal
THERMAL DATA
paths include convection from the top of the package as well as Absolute maximum ratings apply individually only, not in radiation from the package, factors that make ΨJB more useful in combination. The ADP1754/ADP1755 may be damaged if the real-world applications. Maximum junction temperature (TJ) junction temperature limits are exceeded. Monitoring ambient is calculated from the board temperature (TB) and the power temperature does not guarantee that T dissipation (P J is within the specified D) using the following formula: temperature limits. In applications with high power dissipation TJ = TB + (PD × ΨJB) and poor thermal resistance, the maximum ambient temperature Refer to the JEDEC JESD51-8 and JESD51-12 documents for more may need to be derated. In applications with moderate power detailed information about Ψ dissipation and low PCB thermal resistance, the maximum JB. ambient temperature can exceed the maximum limit as long
THERMAL RESISTANCE
as the junction temperature is within specification limits. θJA and ΨJB are specified for the worst-case conditions, that is, a The junction temperature (T device soldered in a circuit board for surface-mount packages. J) of the device is dependent on the ambient temperature (TA), the power dissipation of the device
Table 4. Thermal Resistance
(PD), and the junction-to-ambient thermal resistance of the package (θ
Package Type θJA ΨJB Unit
JA). TJ is calculated using the following formula: 16-Lead LFCSP with Exposed Pad (CP-16-23) 42 25.5 °C/W TJ = TA + (PD × θJA)
ESD CAUTION
Rev. G | Page 5 of 20 Document Outline Features Applications Typical Application Circuits General Description Table of Contents Revision History Specifications Input and Output Capacitor, Recommended Specifications Absolute Maximum Ratings Thermal Data Thermal Resistance ESD Caution Pin Configurations and Function Descriptions Typical Performance Characteristics Theory of Operation Soft Start Function (ADP1754/ADP1755) Adjustable Output Voltage (ADP1755) Enable Feature Power-Good Feature Reverse Current Protection Feature Applications Information Capacitor Selection Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties Undervoltage Lockout Current-Limit and Thermal Overload Protection Thermal Considerations PCB Layout Considerations Outline Dimensions Ordering Guide