Datasheet ADP150 (Analog Devices) - 9
| Fabricante | Analog Devices |
| Descripción | Ultralow Noise, 150 mA CMOS Linear Regulator |
| Páginas / Página | 20 / 9 — Data Sheet. ADP150. –10. IOUT = 100µA. IN = VOUT + 0.5V. OUT = 3.3V. –20. … |
| Revisión | C |
| Formato / tamaño de archivo | PDF / 851 Kb |
| Idioma del documento | Inglés |
Data Sheet. ADP150. –10. IOUT = 100µA. IN = VOUT + 0.5V. OUT = 3.3V. –20. OUT = 1mA. VRIPPLE = 50mV. OUT = 2.8V. OUT = 10mA. CIN = COUT = 1µF
Línea de modelo para esta hoja de datos
- ADP150ACBZ-1.8-R7 ADP150ACBZ-2.5-R7 ADP150ACBZ-2.6-R7 ADP150ACBZ-2.75R7 ADP150ACBZ-2.8-R7 ADP150ACBZ-2.85R7 ADP150ACBZ-3.0-R7 ADP150ACBZ-3.3-R7 ADP150AUJZ-1.8-R7 ADP150AUJZ-2.0-R7 ADP150AUJZ-2.5-R7 ADP150AUJZ-2.65-R7 ADP150AUJZ-2.8-R7 ADP150AUJZ-3.0-R7 ADP150AUJZ-3.3-R7 ADP150WACBZ-1.8-R7 ADP150WACBZ-2.5-R7 ADP150WACBZ-2.6-R7 ADP150WACBZ-2.75-R7 ADP150WACBZ-2.8-R7 ADP150WACBZ-2.85-R7 ADP150WACBZ-3.0-R7 ADP150WACBZ-3.3-R7
Versión de texto del documento
Data Sheet ADP150 –10 15 IOUT = 100µA V V IN = VOUT + 0.5V OUT = 3.3V I V –20 OUT = 1mA VRIPPLE = 50mV OUT = 2.8V I V OUT = 10mA CIN = COUT = 1µF 13 OUT = 1.8V I –30 OUT = 100mA IOUT = 150mA 11 –40 ) V (µ B) 9 d –50 E IS R ( R –60 S NO 7 P S –70 RM 5 –80 3 –90 –100 1
1
10 100 1k 10k 100k 1M 10M
17 0
0.001 0.01 0.1 1 10 100 1k
02 3- 3-
FREQUENCY (Hz)
34
I
34 08
OUT (mA)
08 Figure 17. Power Supply Rejection Ratio (PSRR) vs. Frequency, Figure 20. Output RMS Noise vs. Load Current (IOUT) and VOUT = 3.3 V, VIN = 3.8 V Output Voltage (VOUT), VIN = 5 V, COUT = 1 μF
–10 1 VOUT = 1.8V, IOUT = 100µA VIN = VOUT + 0.5V V V V OUT = 1.8V –20 OUT = 2.8V, IOUT = 100µA RIPPLE = 50mV V V C OUT = 2.8V OUT = 3.3V, IOUT = 100µA IN = COUT = 1µF V VOUT = 3.3V –30 OUT = 1.8V, IOUT = 150mA VOUT = 2.8V, IOUT = 150mA VOUT = 3.3V, IOUT = 150mA –40 ) B) d –50 / Hz V R ( µ 0.1 R ( –60 S E P IS –70 NO –80 –90 –100 0.01 10 100 1k 10k 100k 1M 10M
18 0 20 0 3-
10 100 1k 10k 100k
3-
FREQUENCY (Hz)
34 34 08
FREQUENCY (Hz)
08 Figure 18. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 21. Output Noise Spectrum, VIN = 5 V, ILOAD = 10 mA, COUT = 1 μF Various Output Voltages and Load Currents
–10 T VIN = 3.8V, IOUT = 1mA VRIPPLE = 50mV C IOUT –20 VIN = 4.3V, IOUT = 1mA IN = COUT = 1µF 1mA TO 150mA LOAD STEP VIN = 5.3V, IOUT = 1mA –30 VIN = 3.8V, IOUT = 150mA VIN = 4.3V, IOUT = 150mA V –40 IN = 5.3V, IOUT = 150mA 1 B) d –50 R ( R –60 S V P OUT 2 –70 –80 V –90 IN = 3.7V VOUT = 3.3V –100
22
CH1 100mA CH2 50mV M40µs A CH1 112mA
0
10 100 1k 10k 100k 1M 10M
19 0 3- 3-
T 117.560µs
34
FREQUENCY (Hz)
34 08 08 Figure 19. Power Supply Rejection Ratio (PSRR) vs. Frequency with Figure 22. Load Transient Response, COUT = 1 μF Various Headroom Voltages (VIN − VOUT), VOUT = 3.3 V Rev. C | Page 9 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES
1
10 100 1k 10k 100k 1M 10M
17 0
0.001 0.01 0.1 1 10 100 1k
02 3- 3-
FREQUENCY (Hz)
34
I
34 08
OUT (mA)
08 Figure 17. Power Supply Rejection Ratio (PSRR) vs. Frequency, Figure 20. Output RMS Noise vs. Load Current (IOUT) and VOUT = 3.3 V, VIN = 3.8 V Output Voltage (VOUT), VIN = 5 V, COUT = 1 μF
–10 1 VOUT = 1.8V, IOUT = 100µA VIN = VOUT + 0.5V V V V OUT = 1.8V –20 OUT = 2.8V, IOUT = 100µA RIPPLE = 50mV V V C OUT = 2.8V OUT = 3.3V, IOUT = 100µA IN = COUT = 1µF V VOUT = 3.3V –30 OUT = 1.8V, IOUT = 150mA VOUT = 2.8V, IOUT = 150mA VOUT = 3.3V, IOUT = 150mA –40 ) B) d –50 / Hz V R ( µ 0.1 R ( –60 S E P IS –70 NO –80 –90 –100 0.01 10 100 1k 10k 100k 1M 10M
18 0 20 0 3-
10 100 1k 10k 100k
3-
FREQUENCY (Hz)
34 34 08
FREQUENCY (Hz)
08 Figure 18. Power Supply Rejection Ratio (PSRR) vs. Frequency Figure 21. Output Noise Spectrum, VIN = 5 V, ILOAD = 10 mA, COUT = 1 μF Various Output Voltages and Load Currents
–10 T VIN = 3.8V, IOUT = 1mA VRIPPLE = 50mV C IOUT –20 VIN = 4.3V, IOUT = 1mA IN = COUT = 1µF 1mA TO 150mA LOAD STEP VIN = 5.3V, IOUT = 1mA –30 VIN = 3.8V, IOUT = 150mA VIN = 4.3V, IOUT = 150mA V –40 IN = 5.3V, IOUT = 150mA 1 B) d –50 R ( R –60 S V P OUT 2 –70 –80 V –90 IN = 3.7V VOUT = 3.3V –100
22
CH1 100mA CH2 50mV M40µs A CH1 112mA
0
10 100 1k 10k 100k 1M 10M
19 0 3- 3-
T 117.560µs
34
FREQUENCY (Hz)
34 08 08 Figure 19. Power Supply Rejection Ratio (PSRR) vs. Frequency with Figure 22. Load Transient Response, COUT = 1 μF Various Headroom Voltages (VIN − VOUT), VOUT = 3.3 V Rev. C | Page 9 of 20 Document Outline FEATURES APPLICATIONS TYPICAL APPLICATION CIRCUITS GENERAL DESCRIPTION TABLE OF CONTENTS REVISION HISTORY SPECIFICATIONS RECOMMENDED SPECIFICATIONS: INPUT AND OUTPUT CAPACITOR ABSOLUTE MAXIMUM RATINGS THERMAL DATA THERMAL RESISTANCE ESD CAUTION PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS TYPICAL PERFORMANCE CHARACTERISTICS THEORY OF OPERATION APPLICATIONS INFORMATION CAPACITOR SELECTION Output Capacitor Input Bypass Capacitor Input and Output Capacitor Properties UNDERVOLTAGE LOCKOUT ENABLE FEATURE CURRENT LIMIT AND THERMAL OVERLOAD PROTECTION THERMAL CONSIDERATIONS PCB LAYOUT CONSIDERATIONS OUTLINE DIMENSIONS ORDERING GUIDE NOTES